Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-02 11:10:54 +03:00
Code Issues Packages Projects Releases Wiki Activity

refactor: remove gdma_trigger_peripheral_t

Browse Source
This commit is contained in:
morris
2026-01-13 18:00:11 +08:00
parent b685c0e733
commit 1b258fc8c5
33 changed files with 411 additions and 227 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hal_dma/esp32c2/include/hal/gdma_ll.h
+26 -11
View File
@@ -31,7 +31,6 @@ extern "C" {
// any "valid" peripheral ID can be used for M2M mode
#define GDMA_LL_M2M_FREE_PERIPH_ID_MASK (0x185)
#define GDMA_LL_INVALID_PERIPH_ID (0x3F)
#define GDMA_LL_EVENT_TX_FIFO_UDF (1<<12)
#define GDMA_LL_EVENT_TX_FIFO_OVF (1<<11)
@@ -303,18 +302,27 @@ static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
/**
* @brief Connect DMA RX channel to a given peripheral
*/
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
{
dev->channel[channel].in.in_peri_sel.sel = periph_id;
dev->channel[channel].in.in_conf0.mem_trans_en = (periph == GDMA_TRIG_PERIPH_M2M);
dev->channel[channel].in.in_conf0.mem_trans_en = false;
}
/**
* @brief Disconnect DMA RX channel from peripheral
* @brief Connect DMA RX channel to memory (M2M mode)
*/
static inline void gdma_ll_rx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
static inline void gdma_ll_rx_connect_to_mem(gdma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].in.in_peri_sel.sel = GDMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].in.in_peri_sel.sel = dummy_id;
dev->channel[channel].in.in_conf0.mem_trans_en = true;
}
/**
* @brief Disconnect DMA RX channel from either peripheral or memory
*/
static inline void gdma_ll_rx_disconnect_all(gdma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].in.in_peri_sel.sel = 0x3F;
dev->channel[channel].in.in_conf0.mem_trans_en = false;
}
@@ -520,18 +528,25 @@ static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
/**
* @brief Connect DMA TX channel to a given peripheral
*/
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
{
(void)periph;
dev->channel[channel].out.out_peri_sel.sel = periph_id;
}
/**
* @brief Disconnect DMA TX channel from peripheral
* @brief Connect DMA TX channel to memory (M2M mode)
*/
static inline void gdma_ll_tx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
static inline void gdma_ll_tx_connect_to_mem(gdma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].out.out_peri_sel.sel = GDMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].out.out_peri_sel.sel = dummy_id;
}
/**
* @brief Disconnect DMA TX channel from either peripheral or memory
*/
static inline void gdma_ll_tx_disconnect_all(gdma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].out.out_peri_sel.sel = 0x3F;
}
#ifdef __cplusplus
components/esp_hal_dma/esp32c3/include/hal/gdma_ll.h
+26 -11
View File
@@ -31,7 +31,6 @@ extern "C" {
// any "valid" peripheral ID can be used for M2M mode
#define GDMA_LL_M2M_FREE_PERIPH_ID_MASK (0x1CD)
#define GDMA_LL_INVALID_PERIPH_ID (0x3F)
#define GDMA_LL_EVENT_TX_FIFO_UDF (1<<12)
#define GDMA_LL_EVENT_TX_FIFO_OVF (1<<11)
@@ -303,18 +302,27 @@ static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
/**
* @brief Connect DMA RX channel to a given peripheral
*/
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
{
dev->channel[channel].in.in_peri_sel.sel = periph_id;
dev->channel[channel].in.in_conf0.mem_trans_en = (periph == GDMA_TRIG_PERIPH_M2M);
dev->channel[channel].in.in_conf0.mem_trans_en = false;
}
/**
* @brief Disconnect DMA RX channel from peripheral
* @brief Connect DMA RX channel to memory (M2M mode)
*/
static inline void gdma_ll_rx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
static inline void gdma_ll_rx_connect_to_mem(gdma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].in.in_peri_sel.sel = GDMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].in.in_peri_sel.sel = dummy_id;
dev->channel[channel].in.in_conf0.mem_trans_en = true;
}
/**
* @brief Disconnect DMA RX channel from all peripherals
*/
static inline void gdma_ll_rx_disconnect_all(gdma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].in.in_peri_sel.sel = 0x3F;
dev->channel[channel].in.in_conf0.mem_trans_en = false;
}
@@ -520,18 +528,25 @@ static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
/**
* @brief Connect DMA TX channel to a given peripheral
*/
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
{
(void)periph;
dev->channel[channel].out.out_peri_sel.sel = periph_id;
}
/**
* @brief Disconnect DMA TX channel from peripheral
* @brief Connect DMA TX channel to memory (M2M mode)
*/
static inline void gdma_ll_tx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
static inline void gdma_ll_tx_connect_to_mem(gdma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].out.out_peri_sel.sel = GDMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].out.out_peri_sel.sel = dummy_id;
}
/**
* @brief Disconnect DMA TX channel from all peripherals
*/
static inline void gdma_ll_tx_disconnect_all(gdma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].out.out_peri_sel.sel = 0x3F;
}
#ifdef __cplusplus
components/esp_hal_dma/esp32c5/include/hal/ahb_dma_ll.h
+26 -11
View File
@@ -29,7 +29,6 @@ extern "C" {
// for M2M mode, hardware will automatically assign peri_sel ID depends on the channel number (ch0: 10, ch1: 11, ch2: 12)
#define AHB_DMA_LL_M2M_FREE_PERIPH_ID_MASK (0x1C00)
#define AHB_DMA_LL_INVALID_PERIPH_ID (0x3F)
#define GDMA_LL_EVENT_TX_FIFO_UDF (1<<5)
#define GDMA_LL_EVENT_TX_FIFO_OVF (1<<4)
@@ -388,18 +387,27 @@ static inline void ahb_dma_ll_rx_set_priority(ahb_dma_dev_t *dev, uint32_t chann
/**
* @brief Connect DMA RX channel to a given peripheral
*/
static inline void ahb_dma_ll_rx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void ahb_dma_ll_rx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, int periph_id)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = periph_id;
dev->channel[channel].in.in_conf0.mem_trans_en_chn = (periph == GDMA_TRIG_PERIPH_M2M);
dev->channel[channel].in.in_conf0.mem_trans_en_chn = false;
}
/**
* @brief Disconnect DMA RX channel from peripheral
* @brief Connect DMA RX channel to memory (M2M mode)
*/
static inline void ahb_dma_ll_rx_disconnect_from_periph(ahb_dma_dev_t *dev, uint32_t channel)
static inline void ahb_dma_ll_rx_connect_to_mem(ahb_dma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = AHB_DMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = dummy_id;
dev->channel[channel].in.in_conf0.mem_trans_en_chn = true;
}
/**
* @brief Disconnect DMA RX channel from all peripherals
*/
static inline void ahb_dma_ll_rx_disconnect_all(ahb_dma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = 0x3F;
dev->channel[channel].in.in_conf0.mem_trans_en_chn = false;
}
@@ -656,18 +664,25 @@ static inline void ahb_dma_ll_tx_set_priority(ahb_dma_dev_t *dev, uint32_t chann
/**
* @brief Connect DMA TX channel to a given peripheral
*/
static inline void ahb_dma_ll_tx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void ahb_dma_ll_tx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, int periph_id)
{
(void)periph;
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = periph_id;
}
/**
* @brief Disconnect DMA TX channel from peripheral
* @brief Connect DMA TX channel to memory (M2M mode)
*/
static inline void ahb_dma_ll_tx_disconnect_from_periph(ahb_dma_dev_t *dev, uint32_t channel)
static inline void ahb_dma_ll_tx_connect_to_mem(ahb_dma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = AHB_DMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = dummy_id;
}
/**
* @brief Disconnect DMA TX channel from all peripherals
*/
static inline void ahb_dma_ll_tx_disconnect_all(ahb_dma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = 0x3F;
}
/**
components/esp_hal_dma/esp32c6/include/hal/gdma_ll.h
+26 -11
View File
@@ -32,7 +32,6 @@ extern "C" {
// any "dummy" peripheral ID can be used for M2M mode
#define GDMA_LL_M2M_FREE_PERIPH_ID_MASK (0xFC32)
#define GDMA_LL_INVALID_PERIPH_ID (0x3F)
#define GDMA_LL_EVENT_TX_FIFO_UDF (1<<5)
#define GDMA_LL_EVENT_TX_FIFO_OVF (1<<4)
@@ -337,18 +336,27 @@ static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
/**
* @brief Connect DMA RX channel to a given peripheral
*/
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel = periph_id;
dev->channel[channel].in.in_conf0.mem_trans_en = (periph == GDMA_TRIG_PERIPH_M2M);
dev->channel[channel].in.in_conf0.mem_trans_en = false;
}
/**
* @brief Disconnect DMA RX channel from peripheral
* @brief Connect DMA RX channel to memory (M2M mode)
*/
static inline void gdma_ll_rx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
static inline void gdma_ll_rx_connect_to_mem(gdma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel = GDMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].in.in_peri_sel.peri_in_sel = dummy_id;
dev->channel[channel].in.in_conf0.mem_trans_en = true;
}
/**
* @brief Disconnect DMA RX channel from peripheral/memory
*/
static inline void gdma_ll_rx_disconnect_all(gdma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel = 0x3F;
dev->channel[channel].in.in_conf0.mem_trans_en = false;
}
@@ -564,18 +572,25 @@ static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
/**
* @brief Connect DMA TX channel to a given peripheral
*/
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
{
(void)periph;
dev->channel[channel].out.out_peri_sel.peri_out_sel = periph_id;
}
/**
* @brief Disconnect DMA TX channel from peripheral
* @brief Connect DMA TX channel to memory (M2M mode)
*/
static inline void gdma_ll_tx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
static inline void gdma_ll_tx_connect_to_mem(gdma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].out.out_peri_sel.peri_out_sel = GDMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].out.out_peri_sel.peri_out_sel = dummy_id;
}
/**
* @brief Disconnect DMA TX channel from peripheral/memory
*/
static inline void gdma_ll_tx_disconnect_all(gdma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].out.out_peri_sel.peri_out_sel = 0x3F;
}
/**
components/esp_hal_dma/esp32c61/include/hal/ahb_dma_ll.h
+26 -11
View File
@@ -29,7 +29,6 @@ extern "C" {
// any "dummy" peripheral ID can be used for M2M mode
#define AHB_DMA_LL_M2M_FREE_PERIPH_ID_MASK (0xFE75)
#define AHB_DMA_LL_INVALID_PERIPH_ID (0x3F)
#define GDMA_LL_EVENT_TX_FIFO_UDF (1<<5)
#define GDMA_LL_EVENT_TX_FIFO_OVF (1<<4)
@@ -380,18 +379,27 @@ static inline void ahb_dma_ll_rx_set_priority(ahb_dma_dev_t *dev, uint32_t chann
/**
* @brief Connect DMA RX channel to a given peripheral
*/
static inline void ahb_dma_ll_rx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void ahb_dma_ll_rx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, int periph_id)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = periph_id;
dev->channel[channel].in.in_conf0.mem_trans_en_chn = (periph == GDMA_TRIG_PERIPH_M2M);
dev->channel[channel].in.in_conf0.mem_trans_en_chn = false;
}
/**
* @brief Disconnect DMA RX channel from peripheral
* @brief Connect DMA RX channel to memory (M2M mode)
*/
static inline void ahb_dma_ll_rx_disconnect_from_periph(ahb_dma_dev_t *dev, uint32_t channel)
static inline void ahb_dma_ll_rx_connect_to_mem(ahb_dma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = AHB_DMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = dummy_id;
dev->channel[channel].in.in_conf0.mem_trans_en_chn = true;
}
/**
* @brief Disconnect DMA RX channel from peripheral/memory
*/
static inline void ahb_dma_ll_rx_disconnect_all(ahb_dma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = 0x3F;
dev->channel[channel].in.in_conf0.mem_trans_en_chn = false;
}
@@ -648,18 +656,25 @@ static inline void ahb_dma_ll_tx_set_priority(ahb_dma_dev_t *dev, uint32_t chann
/**
* @brief Connect DMA TX channel to a given peripheral
*/
static inline void ahb_dma_ll_tx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void ahb_dma_ll_tx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, int periph_id)
{
(void)periph;
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = periph_id;
}
/**
* @brief Disconnect DMA TX channel from peripheral
* @brief Connect DMA TX channel to memory (M2M mode)
*/
static inline void ahb_dma_ll_tx_disconnect_from_periph(ahb_dma_dev_t *dev, uint32_t channel)
static inline void ahb_dma_ll_tx_connect_to_mem(ahb_dma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = AHB_DMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = dummy_id;
}
/**
* @brief Disconnect DMA TX channel from peripheral/memory
*/
static inline void ahb_dma_ll_tx_disconnect_all(ahb_dma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = 0x3F;
}
/**
components/esp_hal_dma/esp32h2/include/hal/gdma_ll.h
+26 -11
View File
@@ -32,7 +32,6 @@ extern "C" {
// any "dummy" peripheral ID can be used for M2M mode
#define GDMA_LL_M2M_FREE_PERIPH_ID_MASK (0xFC32)
#define GDMA_LL_INVALID_PERIPH_ID (0x3F)
#define GDMA_LL_EVENT_TX_FIFO_UDF (1<<5)
#define GDMA_LL_EVENT_TX_FIFO_OVF (1<<4)
@@ -337,18 +336,27 @@ static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
/**
* @brief Connect DMA RX channel to a given peripheral
*/
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel = periph_id;
dev->channel[channel].in.in_conf0.mem_trans_en = (periph == GDMA_TRIG_PERIPH_M2M);
dev->channel[channel].in.in_conf0.mem_trans_en = false;
}
/**
* @brief Disconnect DMA RX channel from peripheral
* @brief Connect DMA RX channel to memory (M2M mode)
*/
static inline void gdma_ll_rx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
static inline void gdma_ll_rx_connect_to_mem(gdma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel = GDMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].in.in_peri_sel.peri_in_sel = dummy_id;
dev->channel[channel].in.in_conf0.mem_trans_en = true;
}
/**
* @brief Disconnect DMA RX channel from all peripherals
*/
static inline void gdma_ll_rx_disconnect_all(gdma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel = 0x3F;
dev->channel[channel].in.in_conf0.mem_trans_en = false;
}
@@ -564,18 +572,25 @@ static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
/**
* @brief Connect DMA TX channel to a given peripheral
*/
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
{
(void)periph;
dev->channel[channel].out.out_peri_sel.peri_out_sel = periph_id;
}
/**
* @brief Disconnect DMA TX channel from peripheral
* @brief Connect DMA TX channel to memory (M2M mode)
*/
static inline void gdma_ll_tx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
static inline void gdma_ll_tx_connect_to_mem(gdma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].out.out_peri_sel.peri_out_sel = GDMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].out.out_peri_sel.peri_out_sel = dummy_id;
}
/**
* @brief Disconnect DMA TX channel from all peripherals
*/
static inline void gdma_ll_tx_disconnect_all(gdma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].out.out_peri_sel.peri_out_sel = 0x3F;
}
/**
components/esp_hal_dma/esp32h21/include/hal/gdma_ll.h
+26 -11
View File
@@ -32,7 +32,6 @@ extern "C" {
// any "dummy" peripheral ID can be used for M2M mode
#define GDMA_LL_M2M_FREE_PERIPH_ID_MASK (0xFC32)
#define GDMA_LL_INVALID_PERIPH_ID (0x3F)
#define GDMA_LL_EVENT_TX_FIFO_UDF (1<<5)
#define GDMA_LL_EVENT_TX_FIFO_OVF (1<<4)
@@ -337,18 +336,27 @@ static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
/**
* @brief Connect DMA RX channel to a given peripheral
*/
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = periph_id;
dev->channel[channel].in.in_conf0.mem_trans_en_chn = (periph == GDMA_TRIG_PERIPH_M2M);
dev->channel[channel].in.in_conf0.mem_trans_en_chn = false;
}
/**
* @brief Disconnect DMA RX channel from peripheral
* @brief Connect DMA RX channel to memory (M2M mode)
*/
static inline void gdma_ll_rx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
static inline void gdma_ll_rx_connect_to_mem(gdma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = GDMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = dummy_id;
dev->channel[channel].in.in_conf0.mem_trans_en_chn = true;
}
/**
* @brief Disconnect DMA RX channel from all peripherals
*/
static inline void gdma_ll_rx_disconnect_all(gdma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = 0x3F;
dev->channel[channel].in.in_conf0.mem_trans_en_chn = false;
}
@@ -564,18 +572,25 @@ static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
/**
* @brief Connect DMA TX channel to a given peripheral
*/
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
{
(void)periph;
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = periph_id;
}
/**
* @brief Disconnect DMA TX channel from peripheral
* @brief Connect DMA TX channel to memory (M2M mode)
*/
static inline void gdma_ll_tx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
static inline void gdma_ll_tx_connect_to_mem(gdma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = GDMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = dummy_id;
}
/**
* @brief Disconnect DMA TX channel from all peripherals
*/
static inline void gdma_ll_tx_disconnect_all(gdma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = 0x3F;
}
/**
components/esp_hal_dma/esp32h4/include/hal/ahb_dma_ll.h
+26 -11
View File
@@ -28,7 +28,6 @@ extern "C" {
// any "dummy" peripheral ID can be used for M2M mode
#define AHB_DMA_LL_M2M_FREE_PERIPH_ID_MASK (0xFC00)
#define AHB_DMA_LL_INVALID_PERIPH_ID (0x3F)
#define GDMA_LL_EVENT_TX_FIFO_UDF (1<<5)
#define GDMA_LL_EVENT_TX_FIFO_OVF (1<<4)
@@ -392,18 +391,27 @@ static inline void ahb_dma_ll_rx_set_priority(ahb_dma_dev_t *dev, uint32_t chann
/**
* @brief Connect DMA RX channel to a given peripheral
*/
static inline void ahb_dma_ll_rx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void ahb_dma_ll_rx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, int periph_id)
{
dev->channel[channel].in.in_peri_sel.dma_peri_in_sel_chn = periph_id;
dev->channel[channel].in.in_conf0.dma_mem_trans_en_chn = (periph == GDMA_TRIG_PERIPH_M2M);
dev->channel[channel].in.in_conf0.dma_mem_trans_en_chn = false;
}
/**
* @brief Disconnect DMA RX channel from peripheral
* @brief Connect DMA RX channel to memory (M2M mode)
*/
static inline void ahb_dma_ll_rx_disconnect_from_periph(ahb_dma_dev_t *dev, uint32_t channel)
static inline void ahb_dma_ll_rx_connect_to_mem(ahb_dma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].in.in_peri_sel.dma_peri_in_sel_chn = AHB_DMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].in.in_peri_sel.dma_peri_in_sel_chn = dummy_id;
dev->channel[channel].in.in_conf0.dma_mem_trans_en_chn = true;
}
/**
* @brief Disconnect DMA RX channel from all peripherals
*/
static inline void ahb_dma_ll_rx_disconnect_all(ahb_dma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].in.in_peri_sel.dma_peri_in_sel_chn = 0x3F;
dev->channel[channel].in.in_conf0.dma_mem_trans_en_chn = false;
}
@@ -644,18 +652,25 @@ static inline void ahb_dma_ll_tx_set_priority(ahb_dma_dev_t *dev, uint32_t chann
/**
* @brief Connect DMA TX channel to a given peripheral
*/
static inline void ahb_dma_ll_tx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void ahb_dma_ll_tx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, int periph_id)
{
(void)periph;
dev->channel[channel].out.out_peri_sel.dma_peri_out_sel_chn = periph_id;
}
/**
* @brief Disconnect DMA TX channel from peripheral
* @brief Connect DMA TX channel to memory (M2M mode)
*/
static inline void ahb_dma_ll_tx_disconnect_from_periph(ahb_dma_dev_t *dev, uint32_t channel)
static inline void ahb_dma_ll_tx_connect_to_mem(ahb_dma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].out.out_peri_sel.dma_peri_out_sel_chn = AHB_DMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].out.out_peri_sel.dma_peri_out_sel_chn = dummy_id;
}
/**
* @brief Disconnect DMA TX channel from all peripherals
*/
static inline void ahb_dma_ll_tx_disconnect_all(ahb_dma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].out.out_peri_sel.dma_peri_out_sel_chn = 0x3F;
}
/**
components/esp_hal_dma/esp32p4/include/hal/ahb_dma_ll.h
+24 -9
View File
@@ -24,7 +24,6 @@ extern "C" {
// any "dummy" peripheral ID can be used for M2M mode
#define AHB_DMA_LL_M2M_FREE_PERIPH_ID_MASK (0xFAC2)
#define AHB_DMA_LL_INVALID_PERIPH_ID (0x3F)
///////////////////////////////////// Common /////////////////////////////////////////
/**
@@ -325,16 +324,25 @@ static inline void ahb_dma_ll_rx_set_priority(ahb_dma_dev_t *dev, uint32_t chann
/**
* @brief Connect DMA RX channel to a given peripheral
*/
static inline void ahb_dma_ll_rx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void ahb_dma_ll_rx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, int periph_id)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = periph_id;
dev->channel[channel].in.in_conf0.mem_trans_en_chn = (periph == GDMA_TRIG_PERIPH_M2M);
dev->channel[channel].in.in_conf0.mem_trans_en_chn = false;
}
/**
* @brief Disconnect DMA RX channel from peripheral
* @brief Connect DMA RX channel to memory (M2M mode)
*/
static inline void ahb_dma_ll_rx_disconnect_from_periph(ahb_dma_dev_t *dev, uint32_t channel)
static inline void ahb_dma_ll_rx_connect_to_mem(ahb_dma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = dummy_id;
dev->channel[channel].in.in_conf0.mem_trans_en_chn = true;
}
/**
* @brief Disconnect DMA RX channel from all peripherals
*/
static inline void ahb_dma_ll_rx_disconnect_all(ahb_dma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].in.in_peri_sel.peri_in_sel_chn = 0x3F;
dev->channel[channel].in.in_conf0.mem_trans_en_chn = false;
@@ -606,16 +614,23 @@ static inline void ahb_dma_ll_tx_set_priority(ahb_dma_dev_t *dev, uint32_t chann
/**
* @brief Connect DMA TX channel to a given peripheral
*/
static inline void ahb_dma_ll_tx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void ahb_dma_ll_tx_connect_to_periph(ahb_dma_dev_t *dev, uint32_t channel, int periph_id)
{
(void)periph;
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = periph_id;
}
/**
* @brief Disconnect DMA TX channel from peripheral
* @brief Connect DMA TX channel to memory (M2M mode)
*/
static inline void ahb_dma_ll_tx_disconnect_from_periph(ahb_dma_dev_t *dev, uint32_t channel)
static inline void ahb_dma_ll_tx_connect_to_mem(ahb_dma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = dummy_id;
}
/**
* @brief Disconnect DMA TX channel from all peripherals
*/
static inline void ahb_dma_ll_tx_disconnect_all(ahb_dma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].out.out_peri_sel.peri_out_sel_chn = 0x3F;
}
components/esp_hal_dma/esp32p4/include/hal/axi_dma_ll.h
+24 -9
View File
@@ -24,7 +24,6 @@ extern "C" {
// any "dummy" peripheral ID can be used for M2M mode
#define AXI_DMA_LL_M2M_FREE_PERIPH_ID_MASK (0xFFC0)
#define AXI_DMA_LL_INVALID_PERIPH_ID (0x3F)
///////////////////////////////////// Common /////////////////////////////////////////
/**
@@ -267,16 +266,25 @@ static inline void axi_dma_ll_rx_set_priority(axi_dma_dev_t *dev, uint32_t chann
/**
* @brief Connect DMA RX channel to a given peripheral
*/
static inline void axi_dma_ll_rx_connect_to_periph(axi_dma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void axi_dma_ll_rx_connect_to_periph(axi_dma_dev_t *dev, uint32_t channel, int periph_id)
{
dev->in[channel].conf.in_peri_sel.peri_in_sel_chn = periph_id;
dev->in[channel].conf.in_conf0.mem_trans_en_chn = (periph == GDMA_TRIG_PERIPH_M2M);
dev->in[channel].conf.in_conf0.mem_trans_en_chn = false;
}
/**
* @brief Disconnect DMA RX channel from peripheral
* @brief Connect DMA RX channel to memory (M2M mode)
*/
static inline void axi_dma_ll_rx_disconnect_from_periph(axi_dma_dev_t *dev, uint32_t channel)
static inline void axi_dma_ll_rx_connect_to_mem(axi_dma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->in[channel].conf.in_peri_sel.peri_in_sel_chn = dummy_id;
dev->in[channel].conf.in_conf0.mem_trans_en_chn = true;
}
/**
* @brief Disconnect DMA RX channel from all peripherals
*/
static inline void axi_dma_ll_rx_disconnect_all(axi_dma_dev_t *dev, uint32_t channel)
{
dev->in[channel].conf.in_peri_sel.peri_in_sel_chn = 0x3F;
dev->in[channel].conf.in_conf0.mem_trans_en_chn = false;
@@ -502,16 +510,23 @@ static inline void axi_dma_ll_tx_set_priority(axi_dma_dev_t *dev, uint32_t chann
/**
* @brief Connect DMA TX channel to a given peripheral
*/
static inline void axi_dma_ll_tx_connect_to_periph(axi_dma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void axi_dma_ll_tx_connect_to_periph(axi_dma_dev_t *dev, uint32_t channel, int periph_id)
{
(void)periph;
dev->out[channel].conf.out_peri_sel.peri_out_sel_chn = periph_id;
}
/**
* @brief Disconnect DMA TX channel from peripheral
* @brief Connect DMA TX channel to memory (M2M mode)
*/
static inline void axi_dma_ll_tx_disconnect_from_periph(axi_dma_dev_t *dev, uint32_t channel)
static inline void axi_dma_ll_tx_connect_to_mem(axi_dma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->out[channel].conf.out_peri_sel.peri_out_sel_chn = dummy_id;
}
/**
* @brief Disconnect DMA TX channel from all peripherals
*/
static inline void axi_dma_ll_tx_disconnect_all(axi_dma_dev_t *dev, uint32_t channel)
{
dev->out[channel].conf.out_peri_sel.peri_out_sel_chn = 0x3F;
}
components/esp_hal_dma/esp32s3/include/hal/gdma_ll.h
+26 -11
View File
@@ -32,7 +32,6 @@ extern "C" {
// any "valid" peripheral ID can be used for M2M mode
#define GDMA_LL_M2M_FREE_PERIPH_ID_MASK (0x3FF)
#define GDMA_LL_INVALID_PERIPH_ID (0x3F)
#define GDMA_LL_EVENT_TX_L3_FIFO_UDF (1<<7)
#define GDMA_LL_EVENT_TX_L3_FIFO_OVF (1<<6)
@@ -371,18 +370,27 @@ static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
/**
* @brief Connect DMA RX channel to a given peripheral
*/
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
{
dev->channel[channel].in.peri_sel.sel = periph_id;
dev->channel[channel].in.conf0.mem_trans_en = (periph == GDMA_TRIG_PERIPH_M2M);
dev->channel[channel].in.conf0.mem_trans_en = false;
}
/**
* @brief Disconnect DMA RX channel from peripheral
* @brief Connect DMA RX channel to memory (M2M mode)
*/
static inline void gdma_ll_rx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
static inline void gdma_ll_rx_connect_to_mem(gdma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].in.peri_sel.sel = GDMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].in.peri_sel.sel = dummy_id;
dev->channel[channel].in.conf0.mem_trans_en = true;
}
/**
* @brief Disconnect DMA RX channel from peripheral/memory
*/
static inline void gdma_ll_rx_disconnect_all(gdma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].in.peri_sel.sel = 0x3F;
dev->channel[channel].in.conf0.mem_trans_en = false;
}
@@ -630,18 +638,25 @@ static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
/**
* @brief Connect DMA TX channel to a given peripheral
*/
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
{
(void)periph;
dev->channel[channel].out.peri_sel.sel = periph_id;
}
/**
* @brief Disconnect DMA TX channel from peripheral
* @brief Connect DMA TX channel to memory (M2M mode)
*/
static inline void gdma_ll_tx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
static inline void gdma_ll_tx_connect_to_mem(gdma_dev_t *dev, uint32_t channel, int dummy_id)
{
dev->channel[channel].out.peri_sel.sel = GDMA_LL_INVALID_PERIPH_ID;
dev->channel[channel].out.peri_sel.sel = dummy_id;
}
/**
* @brief Disconnect DMA TX channel from all peripherals
*/
static inline void gdma_ll_tx_disconnect_all(gdma_dev_t *dev, uint32_t channel)
{
dev->channel[channel].out.peri_sel.sel = 0x3F;
}
#ifdef __cplusplus
components/esp_hal_dma/gdma_hal_ahb_v1.c
+17 -9
View File
@@ -60,23 +60,30 @@ void gdma_ahb_hal_set_priority(gdma_hal_context_t *hal, int chan_id, gdma_channe
}
}
void gdma_ahb_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, gdma_trigger_peripheral_t periph, int periph_sub_id)
void gdma_ahb_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int periph_id)
{
if (dir == GDMA_CHANNEL_DIRECTION_RX) {
gdma_ll_rx_reset_channel(hal->dev, chan_id); // reset channel
gdma_ll_rx_connect_to_periph(hal->dev, chan_id, periph, periph_sub_id);
gdma_ll_rx_connect_to_periph(hal->dev, chan_id, periph_id);
} else {
gdma_ll_tx_reset_channel(hal->dev, chan_id); // reset channel
gdma_ll_tx_connect_to_periph(hal->dev, chan_id, periph, periph_sub_id);
gdma_ll_tx_connect_to_periph(hal->dev, chan_id, periph_id);
}
}
void gdma_ahb_hal_disconnect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
void gdma_ahb_hal_connect_mem(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int dummy_id)
{
if (dir == GDMA_CHANNEL_DIRECTION_RX) {
gdma_ll_rx_disconnect_from_periph(hal->dev, chan_id);
gdma_ll_rx_connect_to_mem(hal->dev, chan_id, dummy_id);
} else {
gdma_ll_tx_disconnect_from_periph(hal->dev, chan_id);
gdma_ll_tx_connect_to_mem(hal->dev, chan_id, dummy_id);
}
}
void gdma_ahb_hal_disconnect_all(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
{
if (dir == GDMA_CHANNEL_DIRECTION_RX) {
gdma_ll_rx_disconnect_all(hal->dev, chan_id);
} else {
gdma_ll_tx_disconnect_all(hal->dev, chan_id);
}
}
@@ -184,7 +191,8 @@ void gdma_ahb_hal_init(gdma_hal_context_t *hal, const gdma_hal_config_t *config)
hal->reset = gdma_ahb_hal_reset;
hal->set_priority = gdma_ahb_hal_set_priority;
hal->connect_peri = gdma_ahb_hal_connect_peri;
hal->disconnect_peri = gdma_ahb_hal_disconnect_peri;
hal->connect_mem = gdma_ahb_hal_connect_mem;
hal->disconnect_all = gdma_ahb_hal_disconnect_all;
hal->enable_burst = gdma_ahb_hal_enable_burst;
hal->set_strategy = gdma_ahb_hal_set_strategy;
hal->enable_intr = gdma_ahb_hal_enable_intr;
components/esp_hal_dma/gdma_hal_ahb_v2.c
+17 -9
View File
@@ -61,23 +61,30 @@ void gdma_ahb_hal_set_priority(gdma_hal_context_t *hal, int chan_id, gdma_channe
}
}
void gdma_ahb_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, gdma_trigger_peripheral_t periph, int periph_sub_id)
void gdma_ahb_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int periph_id)
{
if (dir == GDMA_CHANNEL_DIRECTION_RX) {
ahb_dma_ll_rx_reset_channel(hal->ahb_dma_dev, chan_id); // reset channel
ahb_dma_ll_rx_connect_to_periph(hal->ahb_dma_dev, chan_id, periph, periph_sub_id);
ahb_dma_ll_rx_connect_to_periph(hal->ahb_dma_dev, chan_id, periph_id);
} else {
ahb_dma_ll_tx_reset_channel(hal->ahb_dma_dev, chan_id); // reset channel
ahb_dma_ll_tx_connect_to_periph(hal->ahb_dma_dev, chan_id, periph, periph_sub_id);
ahb_dma_ll_tx_connect_to_periph(hal->ahb_dma_dev, chan_id, periph_id);
}
}
void gdma_ahb_hal_disconnect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
void gdma_ahb_hal_connect_mem(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int dummy_id)
{
if (dir == GDMA_CHANNEL_DIRECTION_RX) {
ahb_dma_ll_rx_disconnect_from_periph(hal->ahb_dma_dev, chan_id);
ahb_dma_ll_rx_connect_to_mem(hal->ahb_dma_dev, chan_id, dummy_id);
} else {
ahb_dma_ll_tx_disconnect_from_periph(hal->ahb_dma_dev, chan_id);
ahb_dma_ll_tx_connect_to_mem(hal->ahb_dma_dev, chan_id, dummy_id);
}
}
void gdma_ahb_hal_disconnect_all(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
{
if (dir == GDMA_CHANNEL_DIRECTION_RX) {
ahb_dma_ll_rx_disconnect_all(hal->ahb_dma_dev, chan_id);
} else {
ahb_dma_ll_tx_disconnect_all(hal->ahb_dma_dev, chan_id);
}
}
@@ -253,7 +260,8 @@ void gdma_ahb_hal_init(gdma_hal_context_t *hal, const gdma_hal_config_t *config)
hal->reset = gdma_ahb_hal_reset;
hal->set_priority = gdma_ahb_hal_set_priority;
hal->connect_peri = gdma_ahb_hal_connect_peri;
hal->disconnect_peri = gdma_ahb_hal_disconnect_peri;
hal->connect_mem = gdma_ahb_hal_connect_mem;
hal->disconnect_all = gdma_ahb_hal_disconnect_all;
hal->enable_burst = gdma_ahb_hal_enable_burst;
hal->set_strategy = gdma_ahb_hal_set_strategy;
hal->enable_intr = gdma_ahb_hal_enable_intr;
components/esp_hal_dma/gdma_hal_axi.c
+17 -9
View File
@@ -61,23 +61,30 @@ void gdma_axi_hal_set_priority(gdma_hal_context_t *hal, int chan_id, gdma_channe
}
}
void gdma_axi_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, gdma_trigger_peripheral_t periph, int periph_sub_id)
void gdma_axi_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int periph_id)
{
if (dir == GDMA_CHANNEL_DIRECTION_RX) {
axi_dma_ll_rx_reset_channel(hal->axi_dma_dev, chan_id); // reset channel
axi_dma_ll_rx_connect_to_periph(hal->axi_dma_dev, chan_id, periph, periph_sub_id);
axi_dma_ll_rx_connect_to_periph(hal->axi_dma_dev, chan_id, periph_id);
} else {
axi_dma_ll_tx_reset_channel(hal->axi_dma_dev, chan_id); // reset channel
axi_dma_ll_tx_connect_to_periph(hal->axi_dma_dev, chan_id, periph, periph_sub_id);
axi_dma_ll_tx_connect_to_periph(hal->axi_dma_dev, chan_id, periph_id);
}
}
void gdma_axi_hal_disconnect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
void gdma_axi_hal_connect_mem(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int dummy_id)
{
if (dir == GDMA_CHANNEL_DIRECTION_RX) {
axi_dma_ll_rx_disconnect_from_periph(hal->axi_dma_dev, chan_id);
axi_dma_ll_rx_connect_to_mem(hal->axi_dma_dev, chan_id, dummy_id);
} else {
axi_dma_ll_tx_disconnect_from_periph(hal->axi_dma_dev, chan_id);
axi_dma_ll_tx_connect_to_mem(hal->axi_dma_dev, chan_id, dummy_id);
}
}
void gdma_axi_hal_disconnect_all(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
{
if (dir == GDMA_CHANNEL_DIRECTION_RX) {
axi_dma_ll_rx_disconnect_all(hal->axi_dma_dev, chan_id);
} else {
axi_dma_ll_tx_disconnect_all(hal->axi_dma_dev, chan_id);
}
}
@@ -249,7 +256,8 @@ void gdma_axi_hal_init(gdma_hal_context_t *hal, const gdma_hal_config_t *config)
hal->reset = gdma_axi_hal_reset;
hal->set_priority = gdma_axi_hal_set_priority;
hal->connect_peri = gdma_axi_hal_connect_peri;
hal->disconnect_peri = gdma_axi_hal_disconnect_peri;
hal->connect_mem = gdma_axi_hal_connect_mem;
hal->disconnect_all = gdma_axi_hal_disconnect_all;
hal->enable_burst = gdma_axi_hal_enable_burst;
hal->set_strategy = gdma_axi_hal_set_strategy;
hal->enable_intr = gdma_axi_hal_enable_intr;
components/esp_hal_dma/gdma_hal_top.c
+9 -4
View File
@@ -38,14 +38,19 @@ void gdma_hal_set_priority(gdma_hal_context_t *hal, int chan_id, gdma_channel_di
hal->set_priority(hal, chan_id, dir, priority);
}
void gdma_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, gdma_trigger_peripheral_t periph, int periph_sub_id)
void gdma_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int periph_id)
{
hal->connect_peri(hal, chan_id, dir, periph, periph_sub_id);
hal->connect_peri(hal, chan_id, dir, periph_id);
}
void gdma_hal_disconnect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
void gdma_hal_connect_mem(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int dummy_id)
{
hal->disconnect_peri(hal, chan_id, dir);
hal->connect_mem(hal, chan_id, dir, dummy_id);
}
void gdma_hal_disconnect_all(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
{
hal->disconnect_all(hal, chan_id, dir);
}
void gdma_hal_enable_burst(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool en_data_burst, bool en_desc_burst)
components/esp_hal_dma/include/hal/gdma_hal.h
+7 -4
View File
@@ -80,8 +80,9 @@ struct gdma_hal_context_t {
void (*append)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir); /// Append a descriptor to the channel
void (*reset)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir); /// Reset the channel
void (*set_priority)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, uint32_t priority); /// Set the channel priority
void (*connect_peri)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, gdma_trigger_peripheral_t periph, int periph_sub_id); /// Connect the channel to a peripheral
void (*disconnect_peri)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir); /// Disconnect the channel from a peripheral
void (*connect_peri)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int periph_id); /// Connect the channel to a peripheral
void (*connect_mem)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int dummy_id); /// Connect the channel to memory (for M2M)
void (*disconnect_all)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir); /// Disconnect the channel from all peripherals/memory
void (*enable_burst)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool en_data_burst, bool en_desc_burst); /// Enable burst mode
void (*set_burst_size)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, uint32_t burst_sz); /// Set burst transfer size
void (*set_strategy)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool en_owner_check, bool en_desc_write_back, bool eof_till_popped); /// Set some misc strategy of the channel behaviour
@@ -116,9 +117,11 @@ void gdma_hal_reset(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction
void gdma_hal_set_priority(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, uint32_t priority);
void gdma_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, gdma_trigger_peripheral_t periph, int periph_sub_id);
void gdma_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int periph_id);
void gdma_hal_disconnect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir);
void gdma_hal_connect_mem(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int dummy_id);
void gdma_hal_disconnect_all(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir);
void gdma_hal_enable_burst(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool en_data_burst, bool en_desc_burst);
components/esp_hal_dma/include/hal/gdma_hal_ahb.h
+4 -2
View File
@@ -22,9 +22,11 @@ void gdma_ahb_hal_reset(gdma_hal_context_t *hal, int chan_id, gdma_channel_direc
void gdma_ahb_hal_set_priority(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, uint32_t priority);
void gdma_ahb_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, gdma_trigger_peripheral_t periph, int periph_sub_id);
void gdma_ahb_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int periph_id);
void gdma_ahb_hal_disconnect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir);
void gdma_ahb_hal_connect_mem(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int dummy_id);
void gdma_ahb_hal_disconnect_all(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir);
void gdma_ahb_hal_enable_burst(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool en_data_burst, bool en_desc_burst);
components/esp_hal_dma/include/hal/gdma_hal_axi.h
+4 -2
View File
@@ -22,9 +22,11 @@ void gdma_axi_hal_reset(gdma_hal_context_t *hal, int chan_id, gdma_channel_direc
void gdma_axi_hal_set_priority(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, uint32_t priority);
void gdma_axi_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, gdma_trigger_peripheral_t periph, int periph_sub_id);
void gdma_axi_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int periph_id);
void gdma_axi_hal_disconnect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir);
void gdma_axi_hal_connect_mem(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, int dummy_id);
void gdma_axi_hal_disconnect_all(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir);
void gdma_axi_hal_enable_burst(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool en_data_burst, bool en_desc_burst);