mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-02 11:10:54 +03:00
feat(asrc): Support asrc module on esp32h4
This commit is contained in:
Ma Jing Jing
@@ -0,0 +1,15 @@
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idf_build_get_property(target IDF_TARGET)
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if(${target} STREQUAL "linux")
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return() # This component is not supported by the POSIX/Linux simulator
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endif()
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set(includes "include")
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set(srcs)
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# ASRC related source files
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if(CONFIG_SOC_ASRC_SUPPORTED)
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list(APPEND srcs "asrc_adapter.c")
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endif()
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idf_component_register(SRCS ${srcs}
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INCLUDE_DIRS ${includes}
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REQUIRES esp_hal_asrc esp_driver_dma esp_mm)
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@@ -0,0 +1,215 @@
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/*
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* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "freertos/FreeRTOS.h"
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#include "freertos/queue.h"
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#include "freertos/semphr.h"
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#include "esp_private/gdma.h"
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#include "esp_private/gdma_link.h"
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#include "soc/ahb_dma_struct.h"
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#include "hal/dma_types.h"
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#include "esp_check.h"
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#include "esp_err.h"
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#include "esp_cache.h"
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#include "esp_memory_utils.h"
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#include "esp_private/esp_cache_private.h"
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#include "asrc_adapter.h"
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#define TAG "ASRC_ADAPTER"
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#define ASRC_HW_GDMA_DESC_BUFFER_MAX_SIZE DMA_DESCRIPTOR_BUFFER_MAX_SIZE_16B_ALIGNED
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static bool IRAM_ATTR asrc_hw_rx_eof(gdma_channel_handle_t dma_chan, gdma_event_data_t *event_data, void *user_data)
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{
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portBASE_TYPE higher_priority_task_awoken = pdFALSE;
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asrc_hw_gdma_evt_t asrc_evt = {.gdma_evt = ASRC_HW_GDMA_RECV_FRAME_DONE};
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xQueueSendFromISR(user_data, &asrc_evt, &higher_priority_task_awoken);
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return higher_priority_task_awoken;
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}
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esp_err_t asrc_hw_gdma_create_channel(int asrc_idx, void *user_data, uint16_t max_data_burst_size,
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asrc_hw_gdma_channel_handle_t *dma_tx_chan, asrc_hw_gdma_channel_handle_t *dma_rx_chan)
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{
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ESP_RETURN_ON_FALSE(dma_tx_chan, ESP_ERR_INVALID_ARG, TAG, "NULL pointer");
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ESP_RETURN_ON_FALSE(dma_rx_chan, ESP_ERR_INVALID_ARG, TAG, "NULL pointer");
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esp_err_t ret = ESP_OK;
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gdma_trigger_t trig = {0};
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trig.instance_id = asrc_idx == 0 ? SOC_GDMA_TRIG_PERIPH_ASRC0 : SOC_GDMA_TRIG_PERIPH_ASRC1;
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trig.bus_id = asrc_idx == 0 ? SOC_GDMA_TRIG_PERIPH_ASRC0_BUS : SOC_GDMA_TRIG_PERIPH_ASRC1_BUS;
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gdma_channel_alloc_config_t dma_cfg = {0};
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gdma_channel_handle_t dma_tx = NULL;
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gdma_channel_handle_t dma_rx = NULL;
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bool tx_connected = false;
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bool rx_connected = false;
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ret = gdma_new_ahb_channel(&dma_cfg, &dma_tx, &dma_rx);
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ESP_RETURN_ON_ERROR(ret, TAG, "Fail to new gdma channel");
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ESP_GOTO_ON_ERROR(gdma_connect(dma_tx, trig), cleanup, TAG, "Fail to connect tx channel");
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tx_connected = true;
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ESP_GOTO_ON_ERROR(gdma_connect(dma_rx, trig), cleanup, TAG, "Fail to connect rx channel");
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rx_connected = true;
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gdma_strategy_config_t strategy_config = {
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.auto_update_desc = false,
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.owner_check = true,
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.eof_till_data_popped = true,
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};
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ESP_GOTO_ON_ERROR(gdma_apply_strategy(dma_tx, &strategy_config), cleanup, TAG, "Fail to apply tx strategy");
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ESP_GOTO_ON_ERROR(gdma_apply_strategy(dma_rx, &strategy_config), cleanup, TAG, "Fail to apply rx strategy");
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gdma_transfer_config_t transfer_config = {
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.max_data_burst_size = max_data_burst_size,
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.access_ext_mem = true,
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};
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ESP_GOTO_ON_ERROR(gdma_config_transfer(dma_rx, &transfer_config), cleanup, TAG, "Fail to config rx transfer");
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ESP_GOTO_ON_ERROR(gdma_config_transfer(dma_tx, &transfer_config), cleanup, TAG, "Fail to config tx transfer");
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gdma_rx_event_callbacks_t cb = {.on_recv_eof = asrc_hw_rx_eof};
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ESP_GOTO_ON_ERROR(gdma_register_rx_event_callbacks(dma_rx, &cb, user_data), cleanup, TAG, "Fail to register rx event callbacks");
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*dma_tx_chan = dma_tx;
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*dma_rx_chan = dma_rx;
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return ESP_OK;
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cleanup:
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if (tx_connected) {
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gdma_disconnect(dma_tx);
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}
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if (rx_connected) {
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gdma_disconnect(dma_rx);
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}
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if (dma_tx != NULL) {
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gdma_del_channel(dma_tx);
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}
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if (dma_rx != NULL) {
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gdma_del_channel(dma_rx);
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}
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*dma_tx_chan = NULL;
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*dma_rx_chan = NULL;
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return ret;
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}
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esp_err_t asrc_hw_gdma_create_link_list(uint32_t byte_cnt, asrc_hw_gdma_link_list_handle_t *list_hd, uint32_t *max_desc_num)
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{
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ESP_RETURN_ON_FALSE(list_hd, ESP_ERR_INVALID_ARG, TAG, "NULL pointer");
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ESP_RETURN_ON_FALSE(max_desc_num, ESP_ERR_INVALID_ARG, TAG, "NULL pointer");
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esp_err_t ret = ESP_OK;
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int32_t desc_num = byte_cnt / ASRC_HW_GDMA_DESC_BUFFER_MAX_SIZE;
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if (byte_cnt % ASRC_HW_GDMA_DESC_BUFFER_MAX_SIZE != 0) {
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desc_num++;
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}
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gdma_link_list_handle_t list = (gdma_link_list_handle_t)(*list_hd);
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*list_hd = NULL;
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if (desc_num > *max_desc_num) {
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if (list != NULL) {
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gdma_del_link_list(list);
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list = NULL;
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}
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gdma_link_list_config_t config = {
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.num_items = desc_num,
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};
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ret = gdma_new_link_list(&config, &list);
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ESP_RETURN_ON_ERROR(ret, TAG, "Fail to new link list");
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*max_desc_num = desc_num;
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}
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*list_hd = list;
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return ESP_OK;
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}
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esp_err_t asrc_hw_gdma_mount_link_list(asrc_hw_gdma_link_list_handle_t list_hd, uint32_t desc_num, uint8_t *buf, uint32_t byte_cnt)
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{
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ESP_RETURN_ON_FALSE(buf, ESP_ERR_INVALID_ARG, TAG, "NULL pointer");
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ESP_RETURN_ON_FALSE(list_hd, ESP_ERR_INVALID_ARG, TAG, "NULL pointer");
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esp_err_t ret = ESP_OK;
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uint32_t remaining_byte_cnt = byte_cnt;
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gdma_buffer_mount_config_t mount_config[desc_num] = {};
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for (int i = 0; i < desc_num; i++) {
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mount_config[i].buffer = buf;
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mount_config[i].flags.bypass_buffer_align_check = true;
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if ((i + 1) != desc_num) {
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mount_config[i].length = ASRC_HW_GDMA_DESC_BUFFER_MAX_SIZE;
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mount_config[i].flags.mark_eof = 0;
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mount_config[i].flags.mark_final = GDMA_FINAL_LINK_TO_DEFAULT;
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remaining_byte_cnt -= ASRC_HW_GDMA_DESC_BUFFER_MAX_SIZE;
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} else {
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mount_config[i].length = remaining_byte_cnt;
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mount_config[i].flags.mark_eof = 1;
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mount_config[i].flags.mark_final = GDMA_FINAL_LINK_TO_NULL;
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}
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buf += ASRC_HW_GDMA_DESC_BUFFER_MAX_SIZE;
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}
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ret = gdma_link_mount_buffers((gdma_link_list_handle_t)list_hd, 0, mount_config, desc_num, NULL);
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if (ret != ESP_OK) {
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ESP_LOGE(TAG, "Fail to mount link list, ret: %d", ret);
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return ret;
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}
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return ESP_OK;
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}
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esp_err_t asrc_hw_gdma_start_channel(asrc_hw_gdma_channel_handle_t dma_chan, asrc_hw_gdma_link_list_handle_t desc)
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{
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ESP_RETURN_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, TAG, "NULL pointer");
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ESP_RETURN_ON_FALSE(desc, ESP_ERR_INVALID_ARG, TAG, "NULL pointer");
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gdma_channel_handle_t dma_chan_handle = (gdma_channel_handle_t)dma_chan;
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gdma_reset(dma_chan_handle);
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gdma_start(dma_chan_handle, gdma_link_get_head_addr((gdma_link_list_handle_t)desc));
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return ESP_OK;
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}
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void asrc_hw_gdma_free_link_list(asrc_hw_gdma_link_list_handle_t list_hd)
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{
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if (list_hd != NULL) {
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gdma_del_link_list((gdma_link_list_handle_t)list_hd);
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}
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}
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void asrc_hw_gdma_destroy_channel(asrc_hw_gdma_channel_handle_t dma_tx_chan, asrc_hw_gdma_channel_handle_t dma_rx_chan)
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{
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if (dma_tx_chan != NULL) {
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gdma_channel_handle_t dma_tx_chan_handle = (gdma_channel_handle_t)dma_tx_chan;
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gdma_disconnect(dma_tx_chan_handle);
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gdma_del_channel(dma_tx_chan_handle);
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}
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if (dma_rx_chan != NULL) {
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gdma_channel_handle_t dma_rx_chan_handle = (gdma_channel_handle_t)dma_rx_chan;
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gdma_disconnect(dma_rx_chan_handle);
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gdma_del_channel(dma_rx_chan_handle);
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}
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}
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esp_err_t asrc_hw_get_buffer_alignment(uint32_t heap_caps, size_t *out_alignment)
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{
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return esp_cache_get_alignment(heap_caps, out_alignment);
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}
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esp_err_t asrc_hw_check_buffer_alignment(uint8_t *buffer, uint32_t buffer_size)
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{
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if (esp_ptr_external_ram(buffer) == true) {
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size_t cache_line_size = 0;
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esp_cache_get_alignment(MALLOC_CAP_SPIRAM, &cache_line_size);
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bool aligned_addr = (((uint32_t)buffer % cache_line_size) == 0) && ((buffer_size % cache_line_size) == 0);
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if (!aligned_addr) {
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ESP_LOGE(TAG, "The buffer address(%p) or the buffer size(%ld) is(are) not aligned with cache line size (%ld)",
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buffer, buffer_size, cache_line_size);
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ESP_LOGE(TAG, "Please use esp_asrc_alloc_mem to malloc your buffer");
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return ESP_ERR_INVALID_ARG;
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}
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}
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return ESP_OK;
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}
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esp_err_t asrc_hw_cache_msync_c2m(uint8_t *buffer, uint32_t buffer_size)
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{
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if (esp_ptr_external_ram(buffer) == true) {
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esp_err_t ret = esp_cache_msync(buffer, buffer_size,
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ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED);
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ESP_RETURN_ON_ERROR(ret, TAG, "Inbuf cache sync failed");
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}
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return ESP_OK;
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}
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esp_err_t asrc_hw_cache_msync_m2c(uint8_t *buffer, uint32_t buffer_size)
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{
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if (esp_ptr_external_ram(buffer) == true) {
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esp_err_t ret = esp_cache_msync(buffer, buffer_size, ESP_CACHE_MSYNC_FLAG_DIR_M2C);
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ESP_RETURN_ON_ERROR(ret, TAG, "Outbuf cache sync failed");
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}
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return ESP_OK;
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}
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@@ -0,0 +1,160 @@
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/*
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* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include "esp_err.h"
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/**
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* @brief GDMA channel handle type for ASRC hardware
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*/
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typedef void *asrc_hw_gdma_channel_handle_t;
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/**
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* @brief GDMA descriptor link list handle type for ASRC hardware
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*/
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typedef void *asrc_hw_gdma_link_list_handle_t;
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/**
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* @brief GDMA event type
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*/
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typedef enum {
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ASRC_HW_GDMA_RECV_FRAME_DONE = (1 << 0), /*!< GDMA receive frame done event */
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} asrc_hw_gdma_evt_enum_t;
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/**
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* @brief GDMA event structure
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*/
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typedef struct {
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asrc_hw_gdma_evt_enum_t gdma_evt; /*!< GDMA event from interrupt */
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} asrc_hw_gdma_evt_t;
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/**
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* @brief Create GDMA channels for ASRC hardware
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*
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* @param[in] asrc_idx ASRC hardware index
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* @param[in] user_data User context passed to GDMA callbacks
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* @param[in] max_data_burst_size Maximum data burst size
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* @param[out] dma_tx_chan Returned GDMA TX channel handle
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* @param[out] dma_rx_chan Returned GDMA RX channel handle
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*
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* @return
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* - ESP_OK Create successful
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* - Others Create failed
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*/
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esp_err_t asrc_hw_gdma_create_channel(int asrc_idx, void *user_data, uint16_t max_data_burst_size,
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asrc_hw_gdma_channel_handle_t *dma_tx_chan, asrc_hw_gdma_channel_handle_t *dma_rx_chan);
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/**
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* @brief Create or recreate GDMA descriptor link list if needed
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*
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* @param[in] byte_cnt Total transfer size in bytes
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* @param[inout] list_hd Pointer to descriptor list handle (will be updated if new list is created)
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* @param[inout] max_desc_num Pointer to maximum descriptor number (will be updated if new list is created)
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*
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* @return
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* - ESP_OK Create successful
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* - Others Create failed
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*/
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esp_err_t asrc_hw_gdma_create_link_list(uint32_t byte_cnt, asrc_hw_gdma_link_list_handle_t *list_hd, uint32_t *max_desc_num);
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/**
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* @brief Mount buffers to GDMA descriptor link list
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*
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* @param[in] list_hd Descriptor list handle (must be created by asrc_hw_gdma_create_link_list)
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* @param[in] desc_num Number of descriptors to mount
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* @param[in] buf Pointer to DMA buffer
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* @param[in] byte_cnt Total transfer size in bytes
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*
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* @return
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* - ESP_OK Mount successful
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* - Others Mount failed
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*/
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esp_err_t asrc_hw_gdma_mount_link_list(asrc_hw_gdma_link_list_handle_t list_hd, uint32_t desc_num, uint8_t *buf, uint32_t byte_cnt);
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/**
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* @brief Start GDMA channel for ASRC hardware
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*
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* @param[in] dma_chan GDMA channel handle
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* @param[in] desc GDMA descriptor link list handle
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*
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* @return
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* - ESP_OK Start successful
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* - Others Start failed
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*/
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esp_err_t asrc_hw_gdma_start_channel(asrc_hw_gdma_channel_handle_t dma_chan, asrc_hw_gdma_link_list_handle_t desc);
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/**
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* @brief Free GDMA descriptor link list
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*
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* @param[in] list_hd Descriptor list handle to free
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*/
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void asrc_hw_gdma_free_link_list(asrc_hw_gdma_link_list_handle_t list_hd);
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/**
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* @brief Deinitialize GDMA channels for ASRC hardware
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*
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* @param[in] dma_tx_chan GDMA TX channel handle
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* @param[in] dma_rx_chan GDMA RX channel handle
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*/
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void asrc_hw_gdma_destroy_channel(asrc_hw_gdma_channel_handle_t dma_tx_chan, asrc_hw_gdma_channel_handle_t dma_rx_chan);
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/**
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* @brief Get buffer alignment for a given heap capability
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*
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* @param[in] heap_caps Heap capability to check
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* @param[out] out_alignment Returned buffer alignment
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*
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* @return
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* - ESP_OK Alignment retrieval successful
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* - Others Alignment retrieval failed
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*/
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esp_err_t asrc_hw_get_buffer_alignment(uint32_t heap_caps, size_t *out_alignment);
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/**
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* @brief Check if buffer alignment is valid for ASRC hardware
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*
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* @param[in] buffer Pointer to buffer to check
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* @param[in] buffer_size Buffer size in bytes
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*
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* @return
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* - ESP_OK Buffer alignment is valid
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* - Others Buffer alignment is invalid
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*/
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esp_err_t asrc_hw_check_buffer_alignment(uint8_t *buffer, uint32_t buffer_size);
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/**
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* @brief Cache sync from CPU to memory
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*
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* @param[in] buffer Pointer to buffer to sync
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* @param[in] buffer_size Buffer size in bytes
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*
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* @return
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* - ESP_OK Cache sync successful
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* - Others Cache sync failed
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*/
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esp_err_t asrc_hw_cache_msync_c2m(uint8_t *buffer, uint32_t buffer_size);
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/**
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* @brief Cache sync from memory to CPU
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*
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* @param[in] buffer Pointer to buffer to sync
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* @param[in] buffer_size Buffer size in bytes
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*
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* @return
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* - ESP_OK Cache sync successful
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* - Others Cache sync failed
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*/
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esp_err_t asrc_hw_cache_msync_m2c(uint8_t *buffer, uint32_t buffer_size);
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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