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feat(phy): add check for required clock bits during phy enable

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liuning
2026-03-09 16:52:49 +08:00
parent 82517904ca
commit 1907b8a02e
19 changed files with 189 additions and 1 deletions
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components/hal/esp32c6/include/hal/modem_syscon_ll.h
+7 -1
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -287,6 +287,12 @@ static inline void modem_syscon_ll_clk_conf1_configure(modem_syscon_dev_t *hw, b
}
}
__attribute__((always_inline))
static inline uint32_t modem_syscon_ll_clk_conf1_get(modem_syscon_dev_t *hw)
{
return hw->clk_conf1.val;
}
__attribute__((always_inline))
static inline void modem_syscon_ll_clk_wifibb_configure(modem_syscon_dev_t *hw, bool en)
{