From 16dac308e49902d98a7ca51850b40b5afc772802 Mon Sep 17 00:00:00 2001 From: "Michael.B" Date: Thu, 27 Aug 2026 03:41:30 +0800 Subject: [PATCH] fix(psram): make IDF-15875 backport build clean on v5.4 Guard external-cache suspend for pure-ram apps where esp_cache_utils is not linked, move esp32p4-only xip_psram sdkconfig options into a target-specific file, and add from __future__ import annotations so pytest collection works on CI Python 3.8. --- components/esp_system/port/soc/esp32p4/clk.c | 5 +++++ .../test_apps/flash_encryption/pytest_flash_encrypted.py | 2 ++ .../test_apps/flash_encryption/sdkconfig.ci.xip_psram | 3 --- .../flash_encryption/sdkconfig.ci.xip_psram.esp32p4 | 3 +++ 4 files changed, 10 insertions(+), 3 deletions(-) create mode 100644 components/spi_flash/test_apps/flash_encryption/sdkconfig.ci.xip_psram.esp32p4 diff --git a/components/esp_system/port/soc/esp32p4/clk.c b/components/esp_system/port/soc/esp32p4/clk.c index 2beb05fcc1f..ee756bfee94 100644 --- a/components/esp_system/port/soc/esp32p4/clk.c +++ b/components/esp_system/port/soc/esp32p4/clk.c @@ -96,9 +96,14 @@ void IRAM_ATTR esp_rtc_init(void) */ static void IRAM_ATTR esp_clk_cpu_freq_set_config_isolated(const rtc_cpu_freq_config_t *config) { + /* esp_cache_utils.c is not built for pure-ram apps. */ +#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP esp_cache_suspend_ext_mem_cache(); +#endif rtc_clk_cpu_freq_set_config(config); +#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP esp_cache_resume_ext_mem_cache(); +#endif } __attribute__((weak)) void esp_clk_init(void) diff --git a/components/spi_flash/test_apps/flash_encryption/pytest_flash_encrypted.py b/components/spi_flash/test_apps/flash_encryption/pytest_flash_encrypted.py index d310ea7dfa2..d61df9c5ed4 100644 --- a/components/spi_flash/test_apps/flash_encryption/pytest_flash_encrypted.py +++ b/components/spi_flash/test_apps/flash_encryption/pytest_flash_encrypted.py @@ -1,5 +1,7 @@ # SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD # SPDX-License-Identifier: Apache-2.0 +from __future__ import annotations + import pytest from pytest_embedded import Dut from pytest_embedded_idf.utils import idf_parametrize diff --git a/components/spi_flash/test_apps/flash_encryption/sdkconfig.ci.xip_psram b/components/spi_flash/test_apps/flash_encryption/sdkconfig.ci.xip_psram index f0341170088..3a8a55bdbf5 100644 --- a/components/spi_flash/test_apps/flash_encryption/sdkconfig.ci.xip_psram +++ b/components/spi_flash/test_apps/flash_encryption/sdkconfig.ci.xip_psram @@ -2,10 +2,7 @@ # Places .ext_ram.bss in external PSRAM so a boot-time CPU frequency switch # under PSRAM-XIP can be exercised; without the fix the external .bss is # corrupted during boot. -# On esp32p4, CONFIG_CACHE_L2_CACHE_LINE_128B is required to reproduce. -CONFIG_CACHE_L2_CACHE_LINE_128B=y CONFIG_SPIRAM=y CONFIG_SPIRAM_BOOT_INIT=y CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY=y -CONFIG_SPIRAM_SPEED_250M=y CONFIG_SPIRAM_XIP_FROM_PSRAM=y diff --git a/components/spi_flash/test_apps/flash_encryption/sdkconfig.ci.xip_psram.esp32p4 b/components/spi_flash/test_apps/flash_encryption/sdkconfig.ci.xip_psram.esp32p4 new file mode 100644 index 00000000000..9297379f35e --- /dev/null +++ b/components/spi_flash/test_apps/flash_encryption/sdkconfig.ci.xip_psram.esp32p4 @@ -0,0 +1,3 @@ +# On esp32p4, CONFIG_CACHE_L2_CACHE_LINE_128B is required to reproduce IDF-15875. +CONFIG_CACHE_L2_CACHE_LINE_128B=y +CONFIG_SPIRAM_SPEED_250M=y