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ci(parlio_rx): fixed the parlio rx spi test case

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Chen Jichang
2026-08-28 14:36:35 +08:00
parent b5b7c57da3
commit 1673d8b56d
13 changed files with 104 additions and 167 deletions
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components/hal/esp32h2/include/hal/parlio_ll.h
+2
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@@ -67,6 +67,7 @@ static inline void parlio_ll_enable_bus_clock(int group_id, bool enable)
*
* @param group_id The group id of the parlio module
*/
__attribute__((always_inline))
static inline void parlio_ll_reset_register(int group_id)
{
(void)group_id;
@@ -82,6 +83,7 @@ static inline void parlio_ll_reset_register(int group_id)
* @param dev Parallel IO register base address
* @param src Clock source
*/
__attribute__((always_inline))
static inline void parlio_ll_rx_set_clock_source(parl_io_dev_t *dev, parlio_clock_source_t src)
{
(void)dev;