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Merge branch 'fix/axi_dma_ext_mem_alignment_c5_v6.0' into 'release/v6.0'

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Align AES and SHA buffers to 16 when SPIRAM encryption is enabled (v6.0)

See merge request espressif/esp-idf!43260
This commit is contained in:
Mahavir Jain
2025-11-13 13:27:04 +05:30
parent bd7cbe7109 10cefdd975
commit 145de94717
10 changed files with 100 additions and 55 deletions
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components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
+4
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@@ -519,6 +519,10 @@ config SOC_GDMA_SUPPORT_WEIGHTED_ARBITRATION
bool
default y
config SOC_GDMA_EXT_MEM_ENC_ALIGNMENT
int
default 16
config SOC_GPIO_PORT
int
default 1
components/soc/esp32c5/include/soc/soc_caps.h
+1
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@@ -203,6 +203,7 @@
#define SOC_GDMA_SUPPORT_ETM 1
#define SOC_GDMA_SUPPORT_SLEEP_RETENTION 1
#define SOC_GDMA_SUPPORT_WEIGHTED_ARBITRATION 1
#define SOC_GDMA_EXT_MEM_ENC_ALIGNMENT (16)
/*-------------------------- GPIO CAPS ---------------------------------------*/
// ESP32-C5 has 1 GPIO peripheral
components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
+4
View File
@@ -395,6 +395,10 @@ config SOC_GDMA_SUPPORT_WEIGHTED_ARBITRATION
bool
default y
config SOC_GDMA_EXT_MEM_ENC_ALIGNMENT
int
default 16
config SOC_ETM_SUPPORT_SLEEP_RETENTION
bool
default y
components/soc/esp32c61/include/soc/soc_caps.h
+1
View File
@@ -159,6 +159,7 @@
#define SOC_GDMA_SUPPORT_ETM 1 // Support ETM submodule
#define SOC_GDMA_SUPPORT_SLEEP_RETENTION 1
#define SOC_GDMA_SUPPORT_WEIGHTED_ARBITRATION 1
#define SOC_GDMA_EXT_MEM_ENC_ALIGNMENT (16)
/*-------------------------- ETM CAPS -----------------------------------*/
#define SOC_ETM_SUPPORT_SLEEP_RETENTION 1
components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
+1 -1
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@@ -627,7 +627,7 @@ config SOC_GDMA_SUPPORT_SLEEP_RETENTION
bool
default y
config SOC_AXI_DMA_EXT_MEM_ENC_ALIGNMENT
config SOC_GDMA_EXT_MEM_ENC_ALIGNMENT
int
default 16
components/soc/esp32p4/include/soc/soc_caps.h
+1 -1
View File
@@ -230,7 +230,7 @@
#define SOC_GDMA_SUPPORT_CRC 1
#define SOC_GDMA_SUPPORT_ETM 1
#define SOC_GDMA_SUPPORT_SLEEP_RETENTION 1
#define SOC_AXI_DMA_EXT_MEM_ENC_ALIGNMENT (16)
#define SOC_GDMA_EXT_MEM_ENC_ALIGNMENT (16)
/*-------------------------- GPIO CAPS ---------------------------------------*/
// ESP32-P4 has 1 GPIO peripheral