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refactor(driver_spi): clean spi soc caps

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This commit is contained in:
wanckl
2025-12-12 11:29:42 +08:00
parent 8aff37213c
commit 13e1ae57e1
50 changed files with 348 additions and 1037 deletions
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components/soc/esp32/include/soc/Kconfig.soc_caps.in
+1 -21
View File
@@ -499,27 +499,11 @@ config SOC_RTCIO_WAKE_SUPPORTED
bool
default y
config SOC_SPI_HD_BOTH_INOUT_SUPPORTED
bool
default y
config SOC_SPI_AS_CS_SUPPORTED
bool
default y
config SOC_SPI_PERIPH_NUM
int
default 3
config SOC_SPI_DMA_CHAN_NUM
int
default 2
config SOC_SPI_MAX_CS_NUM
int
default 3
config SOC_SPI_SUPPORT_CLK_APB
config SOC_SPI_HD_BOTH_INOUT_SUPPORTED
bool
default y
@@ -527,10 +511,6 @@ config SOC_SPI_MAXIMUM_BUFFER_SIZE
int
default 64
config SOC_SPI_MAX_PRE_DIVIDER
int
default 8192
config SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED
bool
default y
components/soc/esp32/include/soc/soc_caps.h
+2 -11
View File
@@ -253,18 +253,12 @@
#define SOC_RTCIO_WAKE_SUPPORTED 1
/*-------------------------- SPI CAPS ----------------------------------------*/
#define SOC_SPI_HD_BOTH_INOUT_SUPPORTED 1 //Support enabling MOSI and MISO phases together under Halfduplex mode
#define SOC_SPI_AS_CS_SUPPORTED 1 //Support to toggle the CS while the clock toggles
#define SOC_SPI_PERIPH_NUM 3
#define SOC_SPI_DMA_CHAN_NUM 2
#define SOC_SPI_PERIPH_CS_NUM(i) 3
#define SOC_SPI_MAX_CS_NUM 3
#define SOC_SPI_SUPPORT_CLK_APB 1
#define SOC_SPI_HD_BOTH_INOUT_SUPPORTED 1 //Support enabling MOSI and MISO phases together under Halfduplex mode
#define SOC_SPI_MAXIMUM_BUFFER_SIZE 64
#define SOC_SPI_MAX_PRE_DIVIDER 8192
#define SOC_SPI_MAX_BITWIDTH(host_id) (4) // Supported line mode: DIO, DOUT, QIO, or QOUT
// Although ESP32 doesn't has memspi, but keep consistent with following chips.(This means SPI0/1)
#define SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED 1
@@ -272,9 +266,6 @@
#define SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED 1
#define SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED 1
// Peripheral supports DIO, DOUT, QIO, or QOUT
#define SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(spi_host) ({(void)spi_host; 1;})
/*-------------------------- LP_TIMER CAPS ----------------------------------*/
#define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part
#define SOC_LP_TIMER_BIT_WIDTH_HI 16 // Bit width of lp_timer high part