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Merge branch 'feature/use_zcmp_by_default_v6.1' into 'release/v6.1'

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feat(build): add ZCMP workaround post-build check (v6.1)

See merge request espressif/esp-idf!51325
This commit is contained in:
Roland Dobai
2026-08-27 08:24:39 +02:00
parent b737501fd4 a494009a0c
commit 138482998d
20 changed files with 380 additions and 23 deletions
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components/esp_system/port/soc/esp32c5/system_internal.c
+9
View File
@@ -30,6 +30,9 @@
#endif
#include "esp_private/cache_err_int.h"
#include "esp_memory_utils.h"
#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD && CONFIG_COMPILER_ENABLE_RISCV_ZCMP
#include "esp_private/hw_stack_guard.h"
#endif
#define ALIGN_DOWN(val, align) ((val) & ~((align) - 1))
extern int _bss_end;
@@ -168,6 +171,12 @@ void esp_restart_noos(void)
// If stack is in external RAM (CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM), switch SP to
// internal RAM before disabling the cache to avoid a "Cache disabled but cached memory
// region accessed" crash.
#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD && CONFIG_COMPILER_ENABLE_RISCV_ZCMP
// Stop hw stack guard before changing SP: new SP is outside task stack bounds.
// rtc_clk_cpu_set_to_default_config() (called later) uses vPortEnterCritical() via
// ENABLE_CLK_GATE, which can trigger DIG-661 (assist-debug interrupt with mstatus.mie=0).
esp_hw_stack_guard_monitor_stop();
#endif
uint32_t new_sp = ALIGN_DOWN((uint32_t)&_bss_end, 16);
rv_utils_set_sp((void *)new_sp);
}
components/esp_system/port/soc/esp32c61/system_internal.c
+9
View File
@@ -27,6 +27,9 @@
#include "hal/uart_ll.h"
#include "esp_private/cache_err_int.h"
#include "esp_memory_utils.h"
#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD && CONFIG_COMPILER_ENABLE_RISCV_ZCMP
#include "esp_private/hw_stack_guard.h"
#endif
#define ALIGN_DOWN(val, align) ((val) & ~((align) - 1))
extern int _bss_end;
@@ -160,6 +163,12 @@ void esp_restart_noos(void)
// If stack is in external RAM (CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM), switch SP to
// internal RAM before disabling the cache to avoid a "Cache disabled but cached memory
// region accessed" crash.
#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD && CONFIG_COMPILER_ENABLE_RISCV_ZCMP
// Stop hw stack guard before changing SP: new SP is outside task stack bounds.
// rtc_clk_cpu_set_to_default_config() (called later) uses vPortEnterCritical() via
// ENABLE_CLK_GATE, which can trigger DIG-661 (assist-debug interrupt with mstatus.mie=0).
esp_hw_stack_guard_monitor_stop();
#endif
uint32_t new_sp = ALIGN_DOWN((uint32_t)&_bss_end, 16);
rv_utils_set_sp((void *)new_sp);
}
components/esp_system/port/soc/esp32h4/system_internal.c
+9
View File
@@ -25,6 +25,9 @@
#endif
#include "hal/uart_ll.h"
#include "esp_memory_utils.h"
#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD && CONFIG_COMPILER_ENABLE_RISCV_ZCMP
#include "esp_private/hw_stack_guard.h"
#endif
#define ALIGN_DOWN(val, align) ((val) & ~((align) - 1))
extern int _bss_end;
@@ -178,6 +181,12 @@ void esp_restart_noos(void)
// If stack is in external RAM (CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM), switch SP to
// internal RAM before disabling the cache to avoid a "Cache disabled but cached memory
// region accessed" crash.
#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD && CONFIG_COMPILER_ENABLE_RISCV_ZCMP
// Stop hw stack guard before changing SP: new SP is outside task stack bounds.
// rtc_clk_cpu_set_to_default_config() (called later) uses vPortEnterCritical() via
// ENABLE_CLK_GATE, which can trigger DIG-661 (assist-debug interrupt with mstatus.mie=0).
esp_hw_stack_guard_monitor_stop();
#endif
uint32_t new_sp = ALIGN_DOWN((uint32_t)&_bss_end, 16);
rv_utils_set_sp((void *)new_sp);
}
components/esp_system/port/soc/esp32p4/system_internal.c
+9
View File
@@ -38,6 +38,9 @@
#include "hal/dma2d_ll.h"
#include "hal/efuse_hal.h"
#include "esp_memory_utils.h"
#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD && CONFIG_COMPILER_ENABLE_RISCV_ZCMP
#include "esp_private/hw_stack_guard.h"
#endif
#define ALIGN_DOWN(val, align) ((val) & ~((align) - 1))
extern int _bss_end;
@@ -252,6 +255,12 @@ void esp_restart_noos(void)
// If stack is in external RAM (CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM), switch SP to
// internal RAM before disabling the cache to avoid a "Cache disabled but cached memory
// region accessed" crash.
#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD && CONFIG_COMPILER_ENABLE_RISCV_ZCMP
// Stop hw stack guard before changing SP: new SP is outside task stack bounds.
// rtc_clk_cpu_set_to_default_config() (called later) uses vPortEnterCritical() via
// ENABLE_CLK_GATE, which can trigger DIG-661 (assist-debug interrupt with mstatus.mie=0).
esp_hw_stack_guard_monitor_stop();
#endif
uint32_t new_sp = ALIGN_DOWN((uint32_t)&_bss_end, 16);
rv_utils_set_sp((void *)new_sp);
}