feat(esp32c6): auto adjust LDO voltage using pvt function

components/soc/esp32c6/include/soc/Kconfig.soc_caps.in

@@ -191,6 +191,10 @@ config SOC_PMU_SUPPORTED
     bool
     default y
 
+config SOC_PMU_PVT_SUPPORTED
+    bool
+    default y
+
 config SOC_PAU_SUPPORTED
     bool
     default y

components/soc/esp32c6/include/soc/soc_caps.h

@@ -64,6 +64,7 @@
 #define SOC_APM_SUPPORTED               1
 #define SOC_APM_CTRL_FILTER_SUPPORTED   1
 #define SOC_PMU_SUPPORTED               1
+#define SOC_PMU_PVT_SUPPORTED           1
 #define SOC_PAU_SUPPORTED               1
 #define SOC_LP_TIMER_SUPPORTED          1
 #define SOC_LP_AON_SUPPORTED            1

components/soc/esp32c6/include/soc/system_periph_retention.h

@@ -87,6 +87,16 @@ extern const regdma_entries_config_t flash_spimem_regs_retention[SPIMEM_RETENTIO
 #define SYSTIMER_RETENTION_LINK_LEN   19
 extern const regdma_entries_config_t systimer_regs_retention[SYSTIMER_RETENTION_LINK_LEN];
 
+/**
+ * @brief Provide access to pvt configuration registers retention
+ * context definition.
+ *
+ * This is an internal function of the sleep retention driver, and is not
+ * useful for external use.
+ */
+#define PVT_RETENTION_LINK_LEN        1
+extern const regdma_entries_config_t pvt_regs_retention[PVT_RETENTION_LINK_LEN];
+
 #ifdef __cplusplus
 }
 #endif

components/soc/esp32c6/system_retention_periph.c

@@ -17,6 +17,7 @@
 #include "soc/gpio_reg.h"
 #include "soc/io_mux_reg.h"
 #include "soc/interrupt_matrix_reg.h"
+#include "soc/pvt_reg.h"
 
 /* Interrupt Matrix Registers Context */
 #define N_REGS_INTR_MATRIX()    (((INTMTX_CORE0_CLOCK_GATE_REG - DR_REG_INTERRUPT_MATRIX_BASE) / 4) + 1)
@@ -113,3 +114,10 @@ const regdma_entries_config_t systimer_regs_retention[] = {
     [18] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_SYSTIMER_LINK(0x12), SYSTIMER_INT_ENA_REG,        SYSTIMER_INT_ENA_REG,             1,                                0, 0), .owner = ENTRY(0) | ENTRY(2) }  /* Systimer intr enable */
 };
 _Static_assert(ARRAY_SIZE(systimer_regs_retention) == SYSTIMER_RETENTION_LINK_LEN, "Inconsistent Systimer retention link length definitions");
+
+/* PVT Registers Context */
+#define N_REGS_PVT    (((PVT_COMB_PD_SITE2_UNIT2_VT2_CONF2_REG - DR_REG_PVT_MONITOR_BASE) / 4) + 1)
+const regdma_entries_config_t pvt_regs_retention[] = {
+    [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_PVT_LINK(0x00), DR_REG_PVT_MONITOR_BASE, DR_REG_PVT_MONITOR_BASE, N_REGS_PVT, 0, 0), .owner = ENTRY(0) | ENTRY(2) },
+};
+_Static_assert(ARRAY_SIZE(pvt_regs_retention) == PVT_RETENTION_LINK_LEN, "Inconsistent PVT retention link length definitions");