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feat(esp_hal_rtc_timer): introduce new RTC timer component and refactor existing timer functions
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/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The LL layer for ESP32-C5 LP_Timer register operations
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#pragma once
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#include <stdlib.h>
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#include <stdbool.h>
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#include "soc/soc.h"
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#include "soc/lp_timer_struct.h"
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#include "soc/lp_timer_reg.h"
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#include "soc/lp_aon_reg.h"
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#include "hal/lp_timer_types.h"
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#include "hal/misc.h"
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#include "esp_attr.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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FORCE_INLINE_ATTR void lp_timer_ll_set_alarm_target(lp_timer_dev_t *dev, uint8_t timer_id, uint64_t value)
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{
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->target[timer_id].hi, main_timer_tar_high0, (value >> 32) & 0xFFFF);
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HAL_FORCE_MODIFY_U32_REG_FIELD(dev->target[timer_id].lo, main_timer_tar_low0, value & 0xFFFFFFFF);
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}
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FORCE_INLINE_ATTR void lp_timer_ll_set_target_enable(lp_timer_dev_t *dev, uint8_t timer_id, bool en)
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{
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dev->target[timer_id].hi.main_timer_tar_en0 = en;
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}
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FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_counter_value_low(lp_timer_dev_t *dev, uint8_t buffer_id)
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{
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return HAL_FORCE_READ_U32_REG_FIELD(dev->counter[buffer_id].lo, main_timer_buf0_low);
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}
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FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_counter_value_high(lp_timer_dev_t *dev, uint8_t buffer_id)
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{
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return HAL_FORCE_READ_U32_REG_FIELD(dev->counter[buffer_id].hi, main_timer_buf0_high);
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}
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FORCE_INLINE_ATTR void lp_timer_ll_counter_snapshot(lp_timer_dev_t *dev)
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{
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dev->update.main_timer_update = 1;
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}
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FORCE_INLINE_ATTR void lp_timer_ll_clear_alarm_intr_status(lp_timer_dev_t *dev)
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{
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dev->int_clr.soc_wakeup_int_clr = 1;
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}
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FORCE_INLINE_ATTR void lp_timer_ll_clear_overflow_intr_status(lp_timer_dev_t *dev)
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{
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dev->int_clr.overflow_clr = 1;
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}
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FORCE_INLINE_ATTR void lp_timer_ll_clear_lp_alarm_intr_status(lp_timer_dev_t *dev)
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{
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dev->lp_int_clr.main_timer_lp_int_clr = 1;
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}
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FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_lp_intr_raw(lp_timer_dev_t *dev)
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{
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return dev->lp_int_raw.val;
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}
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FORCE_INLINE_ATTR void lp_timer_ll_clear_lp_intsts_mask(lp_timer_dev_t *dev, uint32_t mask)
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{
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dev->lp_int_clr.val = mask;
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}
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FORCE_INLINE_ATTR void lp_timer_ll_lp_alarm_intr_enable(lp_timer_dev_t *dev, bool enable)
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{
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dev->lp_int_ena.main_timer_lp_int_ena = enable;
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}
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#ifdef __cplusplus
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}
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#endif
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