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feat(phy): add check for required clock bits during phy enable

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liuning
2026-03-09 16:54:45 +08:00
parent 3ce165d115
commit 11f962d8c7
21 changed files with 201 additions and 1 deletions
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components/hal/esp32h2/include/hal/modem_syscon_ll.h
+6
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@@ -197,6 +197,12 @@ static inline void modem_syscon_ll_clk_conf1_configure(modem_syscon_dev_t *hw, b
}
}
__attribute__((always_inline))
static inline uint32_t modem_syscon_ll_clk_conf1_get(modem_syscon_dev_t *hw)
{
return hw->clk_conf1.val;
}
__attribute__((always_inline))
static inline void modem_syscon_ll_enable_fe_16m_clock(modem_syscon_dev_t *hw, bool en)
{