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change(parlio_tx): use shift edge instead sample edge

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Chen Jichang
2026-04-02 18:41:32 +08:00
committed by morris
parent 55e88b4e27
commit 107548e016
8 changed files with 40 additions and 31 deletions
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components/hal/esp32c6/include/hal/parlio_ll.h
+4 -4
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -476,12 +476,12 @@ static inline void parlio_ll_tx_treat_msb_as_valid(parl_io_dev_t *dev, bool en)
}
/**
* @brief Set the sample clock edge
* @brief Set the shift clock edge
*
* @param dev Parallel IO register base address
* @param edge Sample clock edge
* @param edge Shift clock edge
*/
static inline void parlio_ll_tx_set_sample_clock_edge(parl_io_dev_t *dev, parlio_sample_edge_t edge)
static inline void parlio_ll_tx_set_shift_clock_edge(parl_io_dev_t *dev, parlio_shift_edge_t edge)
{
dev->tx_cfg0.tx_smp_edge_sel = edge;
}