From 0c2ebe318007a75160e7b967d8c87478709e2ba3 Mon Sep 17 00:00:00 2001 From: "harshal.patil" Date: Thu, 11 Jun 2026 14:54:10 +0530 Subject: [PATCH] fix(secure_boot): range-check ECDSA r,s in bootloader before ROM verify --- .../esp32c5/include/hal/ecc_ll.h | 5 + .../esp32c61/include/hal/ecc_ll.h | 5 + .../esp32h2/include/hal/ecc_ll.h | 5 + .../esp32p4/include/hal/ecc_ll.h | 5 + components/esp_rom/CMakeLists.txt | 2 +- components/esp_rom/esp32c5/ld/esp32c5.rom.ld | 3 +- .../esp_rom/esp32c61/ld/esp32c61.rom.ld | 3 +- components/esp_rom/esp32h2/ld/esp32h2.rom.ld | 3 +- .../esp_rom/esp32h4/Kconfig.soc_caps.in | 4 - components/esp_rom/esp32h4/esp_rom_caps.h | 1 - components/esp_rom/esp32h4/ld/esp32h4.rom.ld | 2 +- .../esp_rom/esp32p4/ld/esp32p4.rom.eco0_4.ld | 3 +- components/esp_rom/esp32p4/ld/esp32p4.rom.ld | 3 +- .../esp_rom/esp32s31/Kconfig.soc_caps.in | 4 - components/esp_rom/esp32s31/esp_rom_caps.h | 1 - .../esp_rom/esp32s31/ld/esp32s31.rom.ld | 2 +- components/esp_rom/patches/esp_rom_ecdsa.c | 103 ++++++++++++++++++ .../sdkconfig.ci.virt_sb_v2_and_fe.esp32c5 | 2 +- .../sdkconfig.ci.virt_sb_v2_ecdsa_p384_and_fe | 2 +- 19 files changed, 133 insertions(+), 25 deletions(-) diff --git a/components/esp_hal_security/esp32c5/include/hal/ecc_ll.h b/components/esp_hal_security/esp32c5/include/hal/ecc_ll.h index aa8d0738199..c72dfd4e875 100644 --- a/components/esp_hal_security/esp32c5/include/hal/ecc_ll.h +++ b/components/esp_hal_security/esp32c5/include/hal/ecc_ll.h @@ -61,6 +61,11 @@ static inline void ecc_ll_power_up(void) ESP_FAULT_ASSERT(REG_GET_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD) == 0); } +static inline bool ecc_ll_mem_force_pd_is_clear(void) +{ + return REG_GET_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD) == 0; +} + static inline void ecc_ll_power_down(void) { /* Power down the ECC peripheral */ diff --git a/components/esp_hal_security/esp32c61/include/hal/ecc_ll.h b/components/esp_hal_security/esp32c61/include/hal/ecc_ll.h index 717d81a7871..c9f6447dc9a 100644 --- a/components/esp_hal_security/esp32c61/include/hal/ecc_ll.h +++ b/components/esp_hal_security/esp32c61/include/hal/ecc_ll.h @@ -56,6 +56,11 @@ static inline void ecc_ll_power_up(void) ESP_FAULT_ASSERT(REG_GET_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD) == 0); } +static inline bool ecc_ll_mem_force_pd_is_clear(void) +{ + return REG_GET_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD) == 0; +} + static inline void ecc_ll_power_down(void) { /* Power down the ECC peripheral */ diff --git a/components/esp_hal_security/esp32h2/include/hal/ecc_ll.h b/components/esp_hal_security/esp32h2/include/hal/ecc_ll.h index c3904280287..00a897f4c93 100644 --- a/components/esp_hal_security/esp32h2/include/hal/ecc_ll.h +++ b/components/esp_hal_security/esp32h2/include/hal/ecc_ll.h @@ -58,6 +58,11 @@ static inline void ecc_ll_power_up(void) ESP_FAULT_ASSERT(REG_GET_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD) == 0); } +static inline bool ecc_ll_mem_force_pd_is_clear(void) +{ + return REG_GET_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD) == 0; +} + static inline void ecc_ll_power_down(void) { REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PU); diff --git a/components/esp_hal_security/esp32p4/include/hal/ecc_ll.h b/components/esp_hal_security/esp32p4/include/hal/ecc_ll.h index 34a9e98db7f..696c14b94a4 100644 --- a/components/esp_hal_security/esp32p4/include/hal/ecc_ll.h +++ b/components/esp_hal_security/esp32p4/include/hal/ecc_ll.h @@ -75,6 +75,11 @@ static inline void ecc_ll_power_up(void) ESP_FAULT_ASSERT(REG_GET_BIT(HP_SYSTEM_ECC_PD_CTRL_REG, HP_SYSTEM_ECC_MEM_FORCE_PD) == 0); } +static inline bool ecc_ll_mem_force_pd_is_clear(void) +{ + return REG_GET_BIT(HP_SYSTEM_ECC_PD_CTRL_REG, HP_SYSTEM_ECC_MEM_FORCE_PD) == 0; +} + static inline void ecc_ll_power_down(void) { /* Power down the ECC peripheral */ diff --git a/components/esp_rom/CMakeLists.txt b/components/esp_rom/CMakeLists.txt index 6deb2046dff..eed0702b9fb 100644 --- a/components/esp_rom/CMakeLists.txt +++ b/components/esp_rom/CMakeLists.txt @@ -24,7 +24,7 @@ else() "patches/esp_rom_efuse.c" "patches/esp_rom_gpio.c") - list(APPEND private_required_comp soc hal esp_hal_uart) + list(APPEND private_required_comp soc hal esp_hal_uart esp_hal_security) endif() if(CONFIG_IDF_TARGET_ARCH_XTENSA) diff --git a/components/esp_rom/esp32c5/ld/esp32c5.rom.ld b/components/esp_rom/esp32c5/ld/esp32c5.rom.ld index 08cb232ef8c..f7821cf87a3 100644 --- a/components/esp_rom/esp32c5/ld/esp32c5.rom.ld +++ b/components/esp_rom/esp32c5/ld/esp32c5.rom.ld @@ -413,8 +413,7 @@ esp_rom_km_huk_risk = 0x40000898; ets_emsa_pss_verify = 0x4000089c; ets_rsa_pss_verify = 0x400008a0; _rom_ets_ecdsa_verify = 0x400008a4; -ets_secure_boot_verify_bootloader_with_keys = 0x400008a8; -ets_secure_boot_verify_signature = 0x400008ac; +_rom_ets_secure_boot_verify_signature = 0x400008ac; ets_secure_boot_read_key_digests = 0x400008b0; ets_mgf1_sha256 = 0x400008b4; ets_secure_boot_revoke_public_key_digest = 0x400008b8; diff --git a/components/esp_rom/esp32c61/ld/esp32c61.rom.ld b/components/esp_rom/esp32c61/ld/esp32c61.rom.ld index 599fea694eb..ad5d692bb44 100644 --- a/components/esp_rom/esp32c61/ld/esp32c61.rom.ld +++ b/components/esp_rom/esp32c61/ld/esp32c61.rom.ld @@ -371,8 +371,7 @@ ets_efuse_usb_device_disabled = 0x40000808; /* Functions */ _rom_ets_ecdsa_verify = 0x40000810; -ets_secure_boot_verify_bootloader_with_keys = 0x40000814; -ets_secure_boot_verify_signature = 0x40000818; +_rom_ets_secure_boot_verify_signature = 0x40000818; ets_secure_boot_read_key_digests = 0x4000081c; ets_secure_boot_revoke_public_key_digest = 0x40000820; diff --git a/components/esp_rom/esp32h2/ld/esp32h2.rom.ld b/components/esp_rom/esp32h2/ld/esp32h2.rom.ld index 03b9c4a9c48..47690d2af98 100644 --- a/components/esp_rom/esp32h2/ld/esp32h2.rom.ld +++ b/components/esp_rom/esp32h2/ld/esp32h2.rom.ld @@ -362,8 +362,7 @@ ets_efuse_secure_boot_fast_wake_enabled = 0x40000830; ets_emsa_pss_verify = 0x40000834; ets_rsa_pss_verify = 0x40000838; _rom_ets_ecdsa_verify = 0x4000083c; -ets_secure_boot_verify_bootloader_with_keys = 0x40000840; -ets_secure_boot_verify_signature = 0x40000844; +_rom_ets_secure_boot_verify_signature = 0x40000844; ets_secure_boot_read_key_digests = 0x40000848; ets_secure_boot_revoke_public_key_digest = 0x4000084c; diff --git a/components/esp_rom/esp32h4/Kconfig.soc_caps.in b/components/esp_rom/esp32h4/Kconfig.soc_caps.in index 7b9f0c2fc46..9f22685b9a4 100644 --- a/components/esp_rom/esp32h4/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32h4/Kconfig.soc_caps.in @@ -71,10 +71,6 @@ config ESP_ROM_RAM_APP_NEEDS_MMU_INIT bool default y -config ESP_ROM_ECDSA_VERIFY_PATCH - bool - default y - config ESP_ROM_BOOTLOADER_OFFSET_FLASH hex default 0x2000 diff --git a/components/esp_rom/esp32h4/esp_rom_caps.h b/components/esp_rom/esp32h4/esp_rom_caps.h index 24f69478c7d..6b1f02bcde4 100644 --- a/components/esp_rom/esp32h4/esp_rom_caps.h +++ b/components/esp_rom/esp32h4/esp_rom_caps.h @@ -23,6 +23,5 @@ #define ESP_ROM_USB_OTG_NUM (-1) // No USB_OTG CDC in the ROM, set -1 for Kconfig usage. #define ESP_ROM_WDT_INIT_PATCH (1) // ROM version does not configure the clock #define ESP_ROM_RAM_APP_NEEDS_MMU_INIT (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init -#define ESP_ROM_ECDSA_VERIFY_PATCH (1) // ROM ets_ecdsa_verify API requires a software patch #define ESP_ROM_BOOTLOADER_OFFSET_FLASH (0x2000) // Bootloader offset in flash determined by the ROM bootloader #define ESP_ROM_CACHE_WRITEBACK_NEEDS_SYNC_TWICE_NO_MAP (1) // ROM cache writeback related needs patch to avoid sync loss, no map parameter diff --git a/components/esp_rom/esp32h4/ld/esp32h4.rom.ld b/components/esp_rom/esp32h4/ld/esp32h4.rom.ld index 78a1b8252b5..44b02fa5e3d 100644 --- a/components/esp_rom/esp32h4/ld/esp32h4.rom.ld +++ b/components/esp_rom/esp32h4/ld/esp32h4.rom.ld @@ -385,7 +385,7 @@ esp_rom_recover_key = 0x400007cc; ***************************************/ /* Functions */ -_rom_ets_ecdsa_verify = 0x400007d0; +ets_ecdsa_verify = 0x400007d0; ets_secure_boot_verify_bootloader_with_keys = 0x400007d4; ets_secure_boot_verify_signature = 0x400007d8; ets_secure_boot_read_key_digests = 0x400007dc; diff --git a/components/esp_rom/esp32p4/ld/esp32p4.rom.eco0_4.ld b/components/esp_rom/esp32p4/ld/esp32p4.rom.eco0_4.ld index e6e7fa4a9fc..f0bfa948bad 100644 --- a/components/esp_rom/esp32p4/ld/esp32p4.rom.eco0_4.ld +++ b/components/esp_rom/esp32p4/ld/esp32p4.rom.eco0_4.ld @@ -451,8 +451,7 @@ esp_rom_km_huk_risk = 0x4fc0071c; ets_emsa_pss_verify = 0x4fc00720; ets_rsa_pss_verify = 0x4fc00724; _rom_ets_ecdsa_verify = 0x4fc00728; -ets_secure_boot_verify_bootloader_with_keys = 0x4fc0072c; -ets_secure_boot_verify_signature = 0x4fc00730; +_rom_ets_secure_boot_verify_signature = 0x4fc00730; ets_secure_boot_read_key_digests = 0x4fc00734; ets_secure_boot_revoke_public_key_digest = 0x4fc00738; diff --git a/components/esp_rom/esp32p4/ld/esp32p4.rom.ld b/components/esp_rom/esp32p4/ld/esp32p4.rom.ld index 720246d6cae..db0c692dc14 100644 --- a/components/esp_rom/esp32p4/ld/esp32p4.rom.ld +++ b/components/esp_rom/esp32p4/ld/esp32p4.rom.ld @@ -449,8 +449,7 @@ esp_rom_km_huk_risk = 0x4fc00710; ets_emsa_pss_verify = 0x4fc00714; ets_rsa_pss_verify = 0x4fc00718; _rom_ets_ecdsa_verify = 0x4fc0071c; -ets_secure_boot_verify_bootloader_with_keys = 0x4fc00720; -ets_secure_boot_verify_signature = 0x4fc00724; +_rom_ets_secure_boot_verify_signature = 0x4fc00724; ets_secure_boot_read_key_digests = 0x4fc00728; ets_secure_boot_revoke_public_key_digest = 0x4fc0072c; diff --git a/components/esp_rom/esp32s31/Kconfig.soc_caps.in b/components/esp_rom/esp32s31/Kconfig.soc_caps.in index f9ed1dab7d7..83db14746f3 100644 --- a/components/esp_rom/esp32s31/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32s31/Kconfig.soc_caps.in @@ -91,10 +91,6 @@ config ESP_ROM_PRINTS_LOCKUP_STATUS bool default y -config ESP_ROM_ECDSA_VERIFY_PATCH - bool - default y - config ESP_ROM_BOOTLOADER_OFFSET_FLASH hex default 0x2000 diff --git a/components/esp_rom/esp32s31/esp_rom_caps.h b/components/esp_rom/esp32s31/esp_rom_caps.h index a0606da0bdb..b4499994a0e 100644 --- a/components/esp_rom/esp32s31/esp_rom_caps.h +++ b/components/esp_rom/esp32s31/esp_rom_caps.h @@ -29,6 +29,5 @@ #define ESP_ROM_HAS_VERSION (1) // ROM has version/eco information #define ESP_ROM_HAS_OUTPUT_PUTC_FUNC (1) // ROM has esp_rom_output_putc (or ets_write_char_uart) #define ESP_ROM_PRINTS_LOCKUP_STATUS (1) // ROM bootloader already prints CPU lockup diagnostic status -#define ESP_ROM_ECDSA_VERIFY_PATCH (1) // ROM ets_ecdsa_verify API requires a software patch #define ESP_ROM_BOOTLOADER_OFFSET_FLASH (0x2000) // Bootloader offset in flash determined by the ROM bootloader #define ESP_ROM_CACHE_WRITEBACK_NEEDS_SYNC_TWICE_MAP (1) // ROM cache writeback related needs patch to avoid sync loss, need map parameter diff --git a/components/esp_rom/esp32s31/ld/esp32s31.rom.ld b/components/esp_rom/esp32s31/ld/esp32s31.rom.ld index 01d792adcff..bcb1c01162d 100644 --- a/components/esp_rom/esp32s31/ld/esp32s31.rom.ld +++ b/components/esp_rom/esp32s31/ld/esp32s31.rom.ld @@ -467,7 +467,7 @@ esp_rom_recover_key = 0x2f8008b8; /* Functions */ ets_emsa_pss_verify = 0x2f8008bc; ets_rsa_pss_verify = 0x2f8008c0; -_rom_ets_ecdsa_verify = 0x2f8008c4; +ets_ecdsa_verify = 0x2f8008c4; ets_secure_boot_verify_bootloader_with_keys = 0x2f8008c8; ets_secure_boot_verify_signature = 0x2f8008cc; ets_secure_boot_read_key_digests = 0x2f8008d0; diff --git a/components/esp_rom/patches/esp_rom_ecdsa.c b/components/esp_rom/patches/esp_rom_ecdsa.c index 0667fadca61..e967c994eeb 100644 --- a/components/esp_rom/patches/esp_rom_ecdsa.c +++ b/components/esp_rom/patches/esp_rom_ecdsa.c @@ -6,12 +6,15 @@ #include #include +#include #include +#include "sdkconfig.h" #include "esp_rom_caps.h" #if ESP_ROM_ECDSA_VERIFY_PATCH #include "soc/soc_caps.h" #include "esp_fault.h" +#include "hal/ecc_ll.h" #include "rom/ecdsa.h" #define VALID_MAGIC_OK 0x6A6A6A6AU @@ -69,6 +72,19 @@ static bool ecdsa_scalars_in_range(const uint32_t *r, const uint32_t *s, const u return true; } +// TODO: IDF-15721 +/* + * Runtime gate that decides whether the ROM ECDSA verification routines + * (ets_ecdsa_verify / ets_secure_boot_verify_signature) need the software patch + * in this file, or whether the ROM implementation is safe to call directly. + * + * When a future revision of one of these chips ships a ROM with these ECDSA + * verification issues fixed, add a ROM-version check here (e.g. compare the + * _rom_eco_version symbol against the first fixed ROM ECO version for that + * target) and return false for the fixed ROMs, so they skip the patch and jump + * straight to the _rom_ routine. + */ + extern int _rom_ets_ecdsa_verify(const uint8_t *key, const uint8_t *sig, ECDSA_CURVE curve_id, const uint8_t *image_digest, uint8_t *verified_digest); @@ -113,6 +129,9 @@ int ets_ecdsa_verify(const uint8_t *key, const uint8_t *sig, ESP_FAULT_ASSERT(ok && ret_status == VALID_MAGIC_OK); + ecc_ll_power_up(); + ESP_FAULT_ASSERT(ecc_ll_mem_force_pd_is_clear()); + int ret = _rom_ets_ecdsa_verify(key, sig, curve_id, image_digest, verified_digest); if (ret == 1) { @@ -125,4 +144,88 @@ int ets_ecdsa_verify(const uint8_t *key, const uint8_t *sig, return 0; } + +#if CONFIG_SECURE_BOOT_V2_ENABLED || CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT +#include "rom/secure_boot.h" + +#if CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME +static bool esp_rom_ecdsa_scalars_in_range(const uint8_t *r_le, const uint8_t *s_le, size_t component_len) +{ + const uint32_t *n; + int words; + switch (component_len) { + case 24: n = ecdsa_n_p192; words = 6; break; + case 32: n = ecdsa_n_p256; words = 8; break; +#if SOC_ECDSA_SUPPORT_CURVE_P384 + case 48: n = ecdsa_n_p384; words = 12; break; +#endif + default: return false; + } + + uint32_t r[12] = { 0 }; + uint32_t s[12] = { 0 }; + memcpy(r, r_le, component_len); + memcpy(s, s_le, component_len); + + uint32_t result = VALID_MAGIC_FAIL; + bool ok = ecdsa_scalars_in_range(r, s, n, words, &result); + if (!ok || result != VALID_MAGIC_OK) { + return false; + } + ESP_FAULT_ASSERT(ok && result == VALID_MAGIC_OK); + return true; +} + +static bool esp_rom_ecdsa_sig_block_in_range(const ets_secure_boot_sig_block_t *block) +{ + if (block->magic_byte != ETS_SECURE_BOOT_V2_SIGNATURE_MAGIC) { + return true; + } + size_t component_len; + switch (block->ecdsa.key.curve_id) { + case ECDSA_CURVE_P256: component_len = 32; break; +#if SOC_ECDSA_SUPPORT_CURVE_P384 + case ECDSA_CURVE_P384: component_len = 48; break; +#endif + default: return false; + } + return esp_rom_ecdsa_scalars_in_range(&block->ecdsa.signature[0], + &block->ecdsa.signature[component_len], + component_len); +} +#endif /* CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME */ + +extern ets_secure_boot_status_t _rom_ets_secure_boot_verify_signature(const ets_secure_boot_signature_t *sig, + const uint8_t *image_digest, + const ets_secure_boot_key_digests_t *trusted_keys, + uint8_t *verified_digest); + +ets_secure_boot_status_t ets_secure_boot_verify_signature(const ets_secure_boot_signature_t *sig, + const uint8_t *image_digest, + const ets_secure_boot_key_digests_t *trusted_keys, + uint8_t *verified_digest) +{ +#if CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME + volatile ets_secure_boot_status_t range_status = SB_FAILED; + unsigned blocks_in_range = 0; + for (unsigned i = 0; i < SECURE_BOOT_NUM_BLOCKS; i++) { + if (esp_rom_ecdsa_sig_block_in_range(&sig->block[i])) { + blocks_in_range++; + } + } + if (blocks_in_range == SECURE_BOOT_NUM_BLOCKS) { + range_status = SB_SUCCESS; + } + if (range_status != SB_SUCCESS) { + return SB_FAILED; + } + ESP_FAULT_ASSERT(range_status == SB_SUCCESS); + ESP_FAULT_ASSERT(blocks_in_range == SECURE_BOOT_NUM_BLOCKS); + + ecc_ll_power_up(); + ESP_FAULT_ASSERT(ecc_ll_mem_force_pd_is_clear()); +#endif /* CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME */ + return _rom_ets_secure_boot_verify_signature(sig, image_digest, trusted_keys, verified_digest); +} +#endif /* CONFIG_SECURE_BOOT_V2_ENABLED || CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT */ #endif /* ESP_ROM_ECDSA_VERIFY_PATCH */ diff --git a/examples/system/efuse/sdkconfig.ci.virt_sb_v2_and_fe.esp32c5 b/examples/system/efuse/sdkconfig.ci.virt_sb_v2_and_fe.esp32c5 index 8622c2bd0ac..22226e8fdb6 100644 --- a/examples/system/efuse/sdkconfig.ci.virt_sb_v2_and_fe.esp32c5 +++ b/examples/system/efuse/sdkconfig.ci.virt_sb_v2_and_fe.esp32c5 @@ -2,7 +2,7 @@ CONFIG_IDF_TARGET="esp32c5" -CONFIG_PARTITION_TABLE_OFFSET=0xE000 +CONFIG_PARTITION_TABLE_OFFSET=0xF000 CONFIG_PARTITION_TABLE_CUSTOM=y CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="test/partitions_efuse_emul.csv" diff --git a/examples/system/efuse/sdkconfig.ci.virt_sb_v2_ecdsa_p384_and_fe b/examples/system/efuse/sdkconfig.ci.virt_sb_v2_ecdsa_p384_and_fe index bf16d6cce60..71d9d0c0fc7 100644 --- a/examples/system/efuse/sdkconfig.ci.virt_sb_v2_ecdsa_p384_and_fe +++ b/examples/system/efuse/sdkconfig.ci.virt_sb_v2_ecdsa_p384_and_fe @@ -2,7 +2,7 @@ CONFIG_IDF_TARGET="esp32c5" -CONFIG_PARTITION_TABLE_OFFSET=0xE000 +CONFIG_PARTITION_TABLE_OFFSET=0xF000 CONFIG_PARTITION_TABLE_CUSTOM=y CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="test/partitions_efuse_emul.csv"