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reset_reasons: EFUSE_RST is treated as POWERON_RST

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ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.
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KonstantinKondrashov
2021-08-11 12:20:17 +05:00
parent 0fc7bd6a37
commit 0a71dce1ef
5 changed files with 15 additions and 3 deletions
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components/esp_rom/include/esp32s2/rom/rtc.h
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@@ -94,6 +94,7 @@ typedef enum {
TG1WDT_CPU_RESET = 17, /**<17, Time Group1 reset CPU*/
SUPER_WDT_RESET = 18, /**<18, super watchdog reset digital core and rtc module*/
GLITCH_RTC_RESET = 19, /**<19, glitch reset digital core and rtc module*/
EFUSE_RESET = 20, /**<20, efuse reset digital core*/
} RESET_REASON;
typedef enum {