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feat(i2c_master): Add lp_i2c support in i2c master driver
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@@ -36,6 +36,11 @@ extern "C" {
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#define I2C_RCC_ATOMIC()
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#endif
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#if SOC_LP_I2C_SUPPORTED
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#define LP_I2C_SRC_CLK_ATOMIC() PERIPH_RCC_ATOMIC()
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#define LP_I2C_BUS_CLK_ATOMIC() PERIPH_RCC_ATOMIC()
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#endif
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#if CONFIG_I2C_ISR_IRAM_SAFE
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#define I2C_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
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#else
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@@ -100,9 +105,10 @@ typedef struct {
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struct i2c_bus_t {
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i2c_port_num_t port_num; // Port(Bus) ID, index from 0
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bool is_lp_i2c; // true if current port is lp_i2c. false is hp_i2c
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portMUX_TYPE spinlock; // To protect pre-group register level concurrency access
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i2c_hal_context_t hal; // Hal layer for each port(bus)
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i2c_clock_source_t clk_src; // Record the port clock source
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soc_module_clk_t clk_src; // Record the port clock source
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uint32_t clk_src_freq_hz; // Record the clock source frequency
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int sda_num; // SDA pin number
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int scl_num; // SCL pin number
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@@ -232,7 +238,7 @@ esp_err_t i2c_release_bus_handle(i2c_bus_handle_t i2c_bus);
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* - ESP_ERR_INVALID_STATE: Set clock source failed because the clk_src is different from other I2C controller
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* - ESP_FAIL: Set clock source failed because of other error
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*/
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esp_err_t i2c_select_periph_clock(i2c_bus_handle_t handle, i2c_clock_source_t clk_src);
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esp_err_t i2c_select_periph_clock(i2c_bus_handle_t handle, soc_module_clk_t clk_src);
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/**
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* @brief Set I2C SCL/SDA pins
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