Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-02 11:10:54 +03:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'fix-bind_int_wdt_to_cache_livelock_fix_v6.0' into 'release/v6.0'

Browse Source 
fix(esp_system): bind int_wdt to cache livelock workaround (v6.0)

See merge request espressif/esp-idf!49169
This commit is contained in:
Jiang Jiang Jian
2026-06-29 15:36:59 +08:00
parent 340b3aaa65 df645d9d05
commit 08f007f68d
6 changed files with 16 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/bt/controller/esp32/hli_vectors.S
+2 -2
View File
@@ -46,7 +46,7 @@ _l4_save_ctx:
xt_highint4: xt_highint4:
#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX #if CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
/* /*
Here, Timer2 is used to count a little time(50us). Here, Timer2 is used to count a little time(50us).
The subsequent dram0 write operation is blocked due to live lock, which will The subsequent dram0 write operation is blocked due to live lock, which will
@@ -96,7 +96,7 @@ xt_highint4:
rsr a2, EPC1 rsr a2, EPC1
s32i a2, a0, 24 s32i a2, a0, 24
#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX #if CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
movi a0, 0 movi a0, 0
xsr a0, XT_REG_INTENABLE /* disable all interrupts */ xsr a0, XT_REG_INTENABLE /* disable all interrupts */
movi a2, ~(1<<16) movi a2, ~(1<<16)
components/esp_system/include/esp_private/esp_int_wdt.h
+1 -1
View File
@@ -36,7 +36,7 @@ void esp_int_wdt_init(void);
*/ */
void esp_int_wdt_cpu_init(void); void esp_int_wdt_cpu_init(void);
#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX #if CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
/** /**
* @brief Reconfigure WDT stage timeouts (ticks). * @brief Reconfigure WDT stage timeouts (ticks).
* *
components/esp_system/int_wdt.c
+4 -4
View File
@@ -29,7 +29,7 @@
#include "esp_private/sleep_retention.h" #include "esp_private/sleep_retention.h"
#endif #endif
#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX #if CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
#include "esp_private/eco3_livelock_workaround.h" #include "esp_private/eco3_livelock_workaround.h"
#endif #endif
@@ -96,7 +96,7 @@ static void ESP_SYSTEM_IRAM_ATTR reconfigure_ticks(uint32_t stage0_ticks, uint32
wdt_hal_write_protect_enable(&iwdt_context); wdt_hal_write_protect_enable(&iwdt_context);
} }
#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX #if CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
static portMUX_TYPE s_iwdt_configure_lock = portMUX_INITIALIZER_UNLOCKED; static portMUX_TYPE s_iwdt_configure_lock = portMUX_INITIALIZER_UNLOCKED;
void ESP_SYSTEM_IRAM_ATTR esp_int_wdt_reconfigure_ticks(uint32_t stage0_ticks, uint32_t stage1_ticks) void ESP_SYSTEM_IRAM_ATTR esp_int_wdt_reconfigure_ticks(uint32_t stage0_ticks, uint32_t stage1_ticks)
{ {
@@ -125,7 +125,7 @@ static void ESP_SYSTEM_IRAM_ATTR tick_hook(void)
return; return;
} }
#endif #endif
#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX #if CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
esp_int_wdt_set_livelock_params(CONFIG_ESP_INT_WDT_TIMEOUT_MS); esp_int_wdt_set_livelock_params(CONFIG_ESP_INT_WDT_TIMEOUT_MS);
esp_int_wdt_reconfigure_ticks(esp_int_wdt_livelock_get_feed_stage0_ticks(), IWDT_STAGE1_TIMEOUT_US); esp_int_wdt_reconfigure_ticks(esp_int_wdt_livelock_get_feed_stage0_ticks(), IWDT_STAGE1_TIMEOUT_US);
#else #else
@@ -157,7 +157,7 @@ void esp_int_wdt_init(void)
esp_int_wdt_retention_enable(IWDT_TIMER_GROUP); esp_int_wdt_retention_enable(IWDT_TIMER_GROUP);
#endif #endif
#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX #if CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
/* /*
* This is a workaround for issue WDT-3.15 in "ESP32 ECO and workarounds for * This is a workaround for issue WDT-3.15 in "ESP32 ECO and workarounds for
* Bugs" document. * Bugs" document.
components/esp_system/port/include/private/esp_private/eco3_livelock_workaround.h
+2 -2
View File
@@ -14,7 +14,7 @@
extern "C" { extern "C" {
#endif #endif
#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX #if CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
/** /**
* @brief Enable or disable the livelock workaround and reconfigure the interrupt WDT. * @brief Enable or disable the livelock workaround and reconfigure the interrupt WDT.
@@ -49,7 +49,7 @@ void esp_int_wdt_set_livelock_params(uint32_t timeout_ms);
*/ */
void esp_int_wdt_reset_livelock_params(void); void esp_int_wdt_reset_livelock_params(void);
#endif // CONFIG_ESP32_ECO3_CACHE_LOCK_FIX #endif // (CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX)
#ifdef __cplusplus #ifdef __cplusplus
} }
components/esp_system/port/soc/esp32/eco3_livelock_workaround.c
+3
View File
@@ -45,6 +45,9 @@ uint32_t ESP_SYSTEM_IRAM_ATTR esp_int_wdt_livelock_get_feed_stage0_ticks(void)
void ESP_SYSTEM_IRAM_ATTR esp_int_wdt_livelock_workaround(bool enable) void ESP_SYSTEM_IRAM_ATTR esp_int_wdt_livelock_workaround(bool enable)
{ {
if (!soc_has_cache_lock_bug()) {
return;
}
uint32_t stage0_ticks = IWDT_STAGE0_TIMEOUT_US; uint32_t stage0_ticks = IWDT_STAGE0_TIMEOUT_US;
if (enable) { if (enable) {
esp_int_wdt_set_livelock_params(CONFIG_ESP_INT_WDT_TIMEOUT_MS); esp_int_wdt_set_livelock_params(CONFIG_ESP_INT_WDT_TIMEOUT_MS);
components/xtensa/xtensa_vectors.S
+4 -4
View File
@@ -474,7 +474,7 @@ _DebugExceptionVector:
.type _xt_debugexception,@function .type _xt_debugexception,@function
.align 4 .align 4
_xt_debugexception: _xt_debugexception:
#if (CONFIG_ESP32_ECO3_CACHE_LOCK_FIX && CONFIG_BTDM_CTRL_HLI) #if (CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX && CONFIG_BTDM_CTRL_HLI)
s32i a0, sp, XT_STK_EXIT s32i a0, sp, XT_STK_EXIT
#define XT_DEBUGCAUSE_DI (5) #define XT_DEBUGCAUSE_DI (5)
@@ -489,7 +489,7 @@ _xt_debugexception:
extui a0, a0, XT_DEBUGCAUSE_DI, 1 extui a0, a0, XT_DEBUGCAUSE_DI, 1
bnez a0, _xt_debug_di_exc bnez a0, _xt_debug_di_exc
1: 1:
#endif //(CONFIG_ESP32_ECO3_CACHE_LOCK_FIX && CONFIG_BTDM_CTRL_HLI) #endif //(CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX && CONFIG_BTDM_CTRL_HLI)
movi a0,PANIC_RSN_DEBUGEXCEPTION movi a0,PANIC_RSN_DEBUGEXCEPTION
wsr a0,XT_REG_EXCCAUSE wsr a0,XT_REG_EXCCAUSE
@@ -507,7 +507,7 @@ _xt_debugexception:
#endif // CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME #endif // CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME
rfi XCHAL_DEBUGLEVEL rfi XCHAL_DEBUGLEVEL
#if (CONFIG_ESP32_ECO3_CACHE_LOCK_FIX && CONFIG_BTDM_CTRL_HLI) #if (CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX && CONFIG_BTDM_CTRL_HLI)
.align 4 .align 4
_xt_debug_di_exc: _xt_debug_di_exc:
@@ -566,7 +566,7 @@ _xt_debug_di_exc:
rsr a0, XT_REG_EXCSAVE+XCHAL_DEBUGLEVEL rsr a0, XT_REG_EXCSAVE+XCHAL_DEBUGLEVEL
rfi XCHAL_DEBUGLEVEL rfi XCHAL_DEBUGLEVEL
#endif //(CONFIG_ESP32_ECO3_CACHE_LOCK_FIX && CONFIG_BTDM_CTRL_HLI) #endif //(CONFIG_ESP_INT_WDT && CONFIG_ESP32_ECO3_CACHE_LOCK_FIX && CONFIG_BTDM_CTRL_HLI)
#endif // XCHAL_HAVE_DEBUG #endif // XCHAL_HAVE_DEBUG
/* /*