feat(soc): ESP32-S31: enable SOC_ASYNCHRONOUS_BUS_ERROR_MODE

- Enable SOC_ASYNCHRONOUS_BUS_ERROR_MODE to correct MEPC value when debugging.
- Enable gdbstub test_hwloop_jump and test_coproc_registers

components/soc/esp32s31/include/soc/Kconfig.soc_caps.in

@@ -539,6 +539,10 @@ config SOC_RCC_IS_INDEPENDENT
     bool
     default y
 
+config SOC_ASYNCHRONOUS_BUS_ERROR_MODE
+    bool
+    default y
+
 config SOC_PM_SUPPORT_EXT1_WAKEUP
     bool
     default y

components/soc/esp32s31/include/soc/soc_caps.h

@@ -310,7 +310,8 @@
 #define SOC_CLK_LP_FAST_SUPPORT_XTAL              (1)     /*!< Support XTAL clock as the LP_FAST clock source */
 
 #define SOC_RCC_IS_INDEPENDENT                    1       /*!< Reset and Clock Control has own registers for each module */
-
+/*-------------------------- Memory CAPS --------------------------*/
+#define SOC_ASYNCHRONOUS_BUS_ERROR_MODE           (1)
 /*-------------------------- Power Management CAPS ----------------------------*/
 #define SOC_PM_SUPPORT_EXT1_WAKEUP      (1)
 #define SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN   (1) /*!<Supports one bit per pin to configure the EXT1 trigger level */