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feat(esp_hw_support): Memory region protection for ESP32-H4

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harshal.patil
2026-08-25 10:40:28 +05:30
parent 120d813cd9
commit 07debe6edc
7 changed files with 180 additions and 91 deletions
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components/soc/esp32h4/include/soc/Kconfig.soc_caps.in
+4
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@@ -419,6 +419,10 @@ config SOC_CPU_IDRAM_SPLIT_USING_PMP
bool
default y
config SOC_CPU_PMP_REGION_GRANULARITY
int
default 128
config SOC_HP_CPU_HAS_MULTIPLE_CORES
bool
default y
components/soc/esp32h4/include/soc/soc.h
+6 -6
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -142,9 +142,9 @@
#define SOC_DROM_LOW SOC_IROM_LOW
#define SOC_DROM_HIGH SOC_IROM_HIGH
#define SOC_IROM_MASK_LOW 0x40000000
#define SOC_IROM_MASK_HIGH 0x40050000
#define SOC_IROM_MASK_HIGH 0x40020000
#define SOC_DROM_MASK_LOW 0x40000000
#define SOC_DROM_MASK_HIGH 0x40050000
#define SOC_DROM_MASK_HIGH 0x40020000
#define SOC_IRAM_LOW 0x40810000
#define SOC_IRAM_HIGH 0x40860000
#define SOC_DRAM_LOW 0x40810000
@@ -186,9 +186,9 @@
#define SOC_PERIPHERAL_LOW 0x60000000
#define SOC_PERIPHERAL_HIGH 0x60100000
// Debug region, not used by software
#define SOC_DEBUG_LOW 0x20000000
#define SOC_DEBUG_HIGH 0x28000000
// CPU subsystem region (debug mode code and interrupt config)
#define SOC_CPU_SUBSYSTEM_LOW 0x20000000
#define SOC_CPU_SUBSYSTEM_HIGH 0x30000000
// Start (highest address) of ROM boot stack, only relevant during early boot
#define SOC_ROM_STACK_START 0x4085d350
components/soc/esp32h4/include/soc/soc_caps.h
+1
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@@ -173,6 +173,7 @@
#define SOC_CPU_HAS_PMA 1
#define SOC_CPU_IDRAM_SPLIT_USING_PMP 1
#define SOC_CPU_PMP_REGION_GRANULARITY 128
#define SOC_HP_CPU_HAS_MULTIPLE_CORES 1 // Convenience boolean macro used to determine if a target has multiple cores.
#define SOC_CPU_HAS_LOCKUP_RESET 1