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https://github.com/espressif/esp-idf.git
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refactor(rng): move rng read data function to rng_ll.h and update docs of RNG source
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@@ -11,7 +11,7 @@
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#include <sys/param.h>
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#include "esp_attr.h"
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#include "esp_cpu.h"
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#include "soc/wdev_reg.h"
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#include "hal/rng_ll.h"
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#include "esp_private/esp_clk.h"
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#include "soc/soc_caps.h"
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#include "esp_log.h"
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@@ -24,9 +24,6 @@
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#if SOC_RNG_CLOCK_IS_INDEPENDENT
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#include "hal/lp_clkrst_ll.h"
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#if SOC_RNG_BUF_CHAIN_ENTROPY_SOURCE || SOC_RNG_RTC_TIMER_ENTROPY_SOURCE
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#include "hal/rng_ll.h"
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#endif
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#endif
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#if defined CONFIG_IDF_TARGET_ESP32S3
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@@ -62,7 +59,7 @@ uint32_t IRAM_ATTR esp_random(void)
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// Return a fixed pattern for bringup purposes
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return 0x5A5A5A5A;
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#else
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/* The PRNG which implements WDEV_RANDOM register gets 2 bits
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/* The PRNG which implements the hardware RNG data register gets 2 bits
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* of extra entropy from a hardware randomness source every APB clock cycle
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* (provided WiFi or BT are enabled). To make sure entropy is not drained
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* faster than it is added, this function needs to wait for at least 16 APB
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@@ -71,7 +68,7 @@ uint32_t IRAM_ATTR esp_random(void)
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*
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* As a (probably unnecessary) precaution to avoid returning the
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* RNG state as-is, the result is XORed with additional
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* WDEV_RND_REG reads while waiting.
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* hardware RNG register reads while waiting.
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*/
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/* This code does not run in a critical section, so CPU frequency switch may
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@@ -88,7 +85,7 @@ uint32_t IRAM_ATTR esp_random(void)
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for (size_t i = 0; i < sizeof(result); i++) {
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do {
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ccount = esp_cpu_get_cycle_count();
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result ^= REG_READ(WDEV_RND_REG);
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result ^= rng_ll_read_data();
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} while (ccount - last_ccount < cpu_to_apb_freq_ratio * APB_CYCLE_WAIT_NUM);
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#if SOC_RTC_TIMER_SUPPORTED
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uint32_t current_rtc_timer_counter = (rtc_timer_hal_get_cycle_count(0) & 0xFF);
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@@ -96,7 +93,7 @@ uint32_t IRAM_ATTR esp_random(void)
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#endif
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}
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last_ccount = ccount;
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return result ^ REG_READ(WDEV_RND_REG);
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return result ^ rng_ll_read_data();
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#endif // CONFIG_ESP_BRINGUP_BYPASS_RANDOM_SETTING
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}
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