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feat(esp_system): gate some clock by default to optmize esp32p4 active power

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This commit is contained in:
wuzhenghui
2024-09-11 10:53:00 +08:00
parent fba9b50456
commit 05e74480f5
66 changed files with 769 additions and 189 deletions
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components/esp_driver_cam/csi/src/esp_cam_ctlr_csi.c
+6
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@@ -63,7 +63,11 @@ static esp_err_t s_csi_claim_controller(csi_controller_t *controller)
controller->csi_id = i;
PERIPH_RCC_ATOMIC() {
mipi_csi_ll_enable_host_bus_clock(i, 0);
mipi_csi_ll_enable_host_clock(i, 0);
mipi_csi_ll_enable_host_config_clock(i, 0);
mipi_csi_ll_enable_host_bus_clock(i, 1);
mipi_csi_ll_enable_host_clock(i, 1);
mipi_csi_ll_enable_host_config_clock(i, 1);
mipi_csi_ll_reset_host_clock(i);
}
break;
@@ -85,6 +89,8 @@ static esp_err_t s_csi_declaim_controller(csi_controller_t *controller)
s_platform.controllers[controller->csi_id] = NULL;
PERIPH_RCC_ATOMIC() {
mipi_csi_ll_enable_host_bus_clock(controller->csi_id, 0);
mipi_csi_ll_enable_host_clock(controller->csi_id, 0);
mipi_csi_ll_enable_host_config_clock(controller->csi_id, 0);
}
_lock_release(&s_platform.mutex);