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fix(mbedtls): validate ECDSA signature range and harden ECC memory power-down

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Co-Authored-By: Ashish Sharma <ashish.sharma@espressif.com>
This commit is contained in:
harshal.patil
2026-06-16 15:17:49 +05:30
co-authored by Ashish Sharma
parent 52611afb24
commit 046a3bb908
5 changed files with 25 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_system/port/soc/esp32c6/system_internal.c
+2
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@@ -78,6 +78,8 @@ void IRAM_ATTR esp_system_reset_modules_on_exit(void)
CLEAR_PERI_REG_MASK(PCR_HMAC_CONF_REG, PCR_HMAC_RST_EN);
CLEAR_PERI_REG_MASK(PCR_RSA_CONF_REG, PCR_RSA_RST_EN);
CLEAR_PERI_REG_MASK(PCR_SHA_CONF_REG, PCR_SHA_RST_EN);
CLEAR_PERI_REG_MASK(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD);
CLEAR_PERI_REG_MASK(PCR_REGDMA_CONF_REG, PCR_REGDMA_RST_EN);
}
components/esp_system/port/soc/esp32h2/system_internal.c
+1
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@@ -77,6 +77,7 @@ void IRAM_ATTR esp_system_reset_modules_on_exit(void)
CLEAR_PERI_REG_MASK(PCR_HMAC_CONF_REG, PCR_HMAC_RST_EN);
CLEAR_PERI_REG_MASK(PCR_RSA_CONF_REG, PCR_RSA_RST_EN);
CLEAR_PERI_REG_MASK(PCR_SHA_CONF_REG, PCR_SHA_RST_EN);
CLEAR_PERI_REG_MASK(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD);
}
/* "inner" restart function for after RTOS, interrupts & anything else on this
components/hal/esp32c6/include/hal/ecc_ll.h
+3 -1
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -12,6 +12,7 @@
#include "soc/ecc_mult_reg.h"
#include "soc/pcr_struct.h"
#include "soc/pcr_reg.h"
#include "esp_fault.h"
#ifdef __cplusplus
extern "C" {
@@ -46,6 +47,7 @@ static inline void ecc_ll_power_up(void)
{
REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_PD);
REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD);
ESP_FAULT_ASSERT(REG_GET_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD) == 0);
}
static inline void ecc_ll_power_down(void)
components/hal/esp32h2/include/hal/ecc_ll.h
+3 -1
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -12,6 +12,7 @@
#include "soc/ecc_mult_reg.h"
#include "soc/pcr_struct.h"
#include "soc/pcr_reg.h"
#include "esp_fault.h"
#include "soc/chip_revision.h"
#include "hal/efuse_hal.h"
@@ -54,6 +55,7 @@ static inline void ecc_ll_power_up(void)
{
REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_PD);
REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD);
ESP_FAULT_ASSERT(REG_GET_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD) == 0);
}
static inline void ecc_ll_power_down(void)
components/mbedtls/port/ecdsa/ecdsa_alt.c
+16 -4
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,6 +9,7 @@
#include "hal/ecc_ll.h"
#include "hal/mpi_ll.h"
#include "esp_crypto_lock.h"
#include "esp_fault.h"
#include "esp_efuse.h"
#include "esp_private/esp_crypto_lock_internal.h"
#include "mbedtls/error.h"
@@ -530,11 +531,22 @@ static int esp_ecdsa_verify(mbedtls_ecp_group *grp,
return MBEDTLS_ERR_ECP_BAD_INPUT_DATA;
}
if (mbedtls_mpi_cmp_int(r, 1) < 0 || mbedtls_mpi_cmp_mpi(r, &grp->N) >= 0 ||
mbedtls_mpi_cmp_int(s, 1) < 0 || mbedtls_mpi_cmp_mpi(s, &grp->N) >= 0 )
{
/* 1 <= scalar <= n-1: that is, scalar > 0 and scalar < n. */
#define RANGE_OK 0x6A6A6A6AU
#define RANGE_FAIL 0x95959595U
volatile uint32_t verdict = RANGE_FAIL;
if (mbedtls_mpi_cmp_int(r, 0) > 0 &&
mbedtls_mpi_cmp_mpi(r, &grp->N) < 0 &&
mbedtls_mpi_cmp_int(s, 0) > 0 &&
mbedtls_mpi_cmp_mpi(s, &grp->N) < 0) {
verdict = RANGE_OK;
}
if (verdict != RANGE_OK) {
return MBEDTLS_ERR_ECP_VERIFY_FAILED;
}
ESP_FAULT_ASSERT(verdict == RANGE_OK);
#undef RANGE_OK
#undef RANGE_FAIL
ecdsa_be_to_le(buf, sha_le, len);