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fix(uart): lp uart rx iomux pin was not working as expected

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Introduced in 8818157e42
The workaround in the commit routes the signal to LP GPIO matrix first.
When uses LP IOMUX pin as UART RX, the signal did not bypass the matrix,
which caused the issue.

This commit adds rtc_gpio_iomux_input and rtc_gpio_iomux_output APIs
to align with existing GPIO driver APIs.
This commit is contained in:
Song Ruo Jing
2026-04-14 20:21:13 +08:00
parent 8174676c28
commit 0428bd18bf
6 changed files with 108 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/driver/gpio/include/driver/rtc_io.h
+25
View File
@@ -211,6 +211,31 @@ esp_err_t rtc_gpio_get_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t* s
*/
esp_err_t rtc_gpio_iomux_func_sel(gpio_num_t gpio_num, int func);
/**
* @brief Set pad input to an LP peripheral signal through the LP(RTC) IOMUX.
*
* @param gpio_num GPIO number
* @param func The index number of the LP(RTC) IOMUX function to be selected for the pin
* @param signal_idx Peripheral signal index to input. One of the ``*_IN_IDX`` signals in ``soc/lp_gpio_sig_map.h``.
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG GPIO number error
*/
esp_err_t rtc_gpio_iomux_input(gpio_num_t gpio_num, int func, uint32_t signal_idx);
/**
* @brief Set LP peripheral output to an RTC IO pad through the LP(RTC) IOMUX.
*
* @param gpio_num GPIO number
* @param func The index number of the LP(RTC) IOMUX function to be selected for the pin
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG GPIO number error
*/
esp_err_t rtc_gpio_iomux_output(gpio_num_t gpio_num, int func);
#endif // SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
#if SOC_RTCIO_HOLD_SUPPORTED
components/driver/gpio/rtc_io.c
+18
View File
@@ -180,6 +180,24 @@ esp_err_t rtc_gpio_iomux_func_sel(gpio_num_t gpio_num, int func)
return ESP_OK;
}
esp_err_t rtc_gpio_iomux_input(gpio_num_t gpio_num, int func, uint32_t signal_idx)
{
ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL();
rtcio_hal_iomux_input(rtc_io_number_get(gpio_num), func, signal_idx);
RTCIO_EXIT_CRITICAL();
return ESP_OK;
}
esp_err_t rtc_gpio_iomux_output(gpio_num_t gpio_num, int func)
{
ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL();
rtcio_hal_iomux_output(rtc_io_number_get(gpio_num), func);
RTCIO_EXIT_CRITICAL();
return ESP_OK;
}
#if SOC_LP_GPIO_MATRIX_SUPPORTED
esp_err_t lp_gpio_connect_in_signal(gpio_num_t gpio_num, uint32_t signal_idx, bool inv)
{
components/driver/uart/uart.c
+5 -6
View File
@@ -721,13 +721,12 @@ static bool uart_try_set_iomux_pin(uart_port_t uart_num, int io_num, uint32_t id
}
#if (SOC_UART_LP_NUM >= 1)
else {
if (upin->input) {
rtc_gpio_set_direction(io_num, RTC_GPIO_MODE_INPUT_ONLY);
} else {
rtc_gpio_set_direction(io_num, RTC_GPIO_MODE_OUTPUT_ONLY);
}
rtc_gpio_init(io_num);
rtc_gpio_iomux_func_sel(io_num, upin->iomux_func);
if (upin->input) {
rtc_gpio_iomux_input(io_num, upin->iomux_func, upin->signal);
} else {
rtc_gpio_iomux_output(io_num, upin->iomux_func);
}
// undo the workaround done in uart_module_enable for RX pin
#if !SOC_LP_GPIO_MATRIX_SUPPORTED
if (upin->input) {