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https://github.com/espressif/esp-idf.git
synced 2026-10-02 11:10:54 +03:00
feat(esp32p4): add H264 REGDMA link and sleep retention module
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@@ -102,6 +102,9 @@ bool peripheral_domain_pd_allowed(void)
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// ESP32P4 supports LCDCAM sleep retention
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RETENTION_MODULE_BITMAP_SET(&mask, SLEEP_RETENTION_MODULE_LCDCAM);
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// ESP32P4 supports H264 sleep retention
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RETENTION_MODULE_BITMAP_SET(&mask, SLEEP_RETENTION_MODULE_H264);
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const sleep_retention_module_bitmap_t peripheral_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
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const sleep_retention_module_bitmap_t peripheral_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
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return sleep_retention_module_bitmap_eq(peripheral_domain_inited_modules, peripheral_domain_created_modules);
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@@ -1891,6 +1891,10 @@ config SOC_JPEG_ENCODE_SUPPORTED
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bool
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default y
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config SOC_H264_ENCODER_SUPPORTED
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bool
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default y
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config SOC_LCDCAM_CAM_SUPPORT_RGB_YUV_CONV
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bool
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default y
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@@ -63,6 +63,7 @@ typedef enum periph_retention_module {
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SLEEP_RETENTION_MODULE_EMAC = 37,
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SLEEP_RETENTION_MODULE_JPEG = 38,
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SLEEP_RETENTION_MODULE_LCDCAM = 39,
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SLEEP_RETENTION_MODULE_H264 = 40,
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/* PMU REGDMA clock icg */
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SLEEP_RETENTION_MODULE_CLOCK_ICG = SOC_PM_RETENTION_MODULE_NUM - 2,
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@@ -70,7 +71,7 @@ typedef enum periph_retention_module {
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SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
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} periph_retention_module_t;
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#define is_top_domain_module(m) (((m) <= SLEEP_RETENTION_MODULE_LCDCAM) || ((m) == SLEEP_RETENTION_MODULE_CLOCK_ICG))
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#define is_top_domain_module(m) (((m) <= SLEEP_RETENTION_MODULE_H264) || ((m) == SLEEP_RETENTION_MODULE_CLOCK_ICG))
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#ifdef __cplusplus
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}
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@@ -723,6 +723,9 @@
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#define SOC_JPEG_DECODE_SUPPORTED (1)
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#define SOC_JPEG_ENCODE_SUPPORTED (1)
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/*--------------------------- H264 --------------------------------*/
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#define SOC_H264_ENCODER_SUPPORTED (1)
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/*--------------------------- CAM ---------------------------------*/
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#define SOC_LCDCAM_CAM_SUPPORT_RGB_YUV_CONV (1)
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@@ -68,6 +68,7 @@ extern "C" {
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#define REGDMA_EMAC_LINK(_pri) ((0x27 << 8) | _pri)
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#define REGDMA_JPEG_LINK(_pri) ((0x28 << 8) | _pri)
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#define REGDMA_LCDCAM_LINK(_pri) ((0x29 << 8) | _pri)
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#define REGDMA_H264_LINK(_pri) ((0x2a << 8) | _pri)
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#define REGDMA_CLOCK_ICG_LINK(_pri) ((0xFE << 8) | _pri)
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#define REGDMA_MODEM_FE_LINK(_pri) ((0xFF << 8) | _pri)
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@@ -100,6 +101,7 @@ extern "C" {
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#define REGDMA_LINK_PRI_EMAC REGDMA_LINK_PRI_GENERAL_PERIPH
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#define REGDMA_LINK_PRI_JPEG REGDMA_LINK_PRI_GENERAL_PERIPH
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#define REGDMA_LINK_PRI_LCDCAM REGDMA_LINK_PRI_GENERAL_PERIPH
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#define REGDMA_LINK_PRI_H264 REGDMA_LINK_PRI_GENERAL_PERIPH
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typedef enum {
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REGDMA_LINK_PRI_0 = 0,
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