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fix(pvt): fix pvt retention bug,replace pvt_retention with pvt_init

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zlq
2026-01-09 15:55:38 +08:00
parent aae3f7acae
commit 02f3974b6a
10 changed files with 29 additions and 15 deletions
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components/hal/esp32c6/include/hal/clk_gate_ll.h
+7 -4
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -220,10 +220,11 @@ FORCE_INLINE_ATTR void _clk_gate_ll_rtc_fast_to_lp_periph_en(bool enable)
typedef struct {
bool disable_uart0_clk; ///< Disable UART0 clock
bool disable_uart1_clk; ///< Disable UART1 clock
bool disable_mspi_flash_clk; ///< Disable MSPI flash clock
bool disable_mspi_flash_clk; ///< Disable MSPI flash clock
bool disable_assist_clk; ///< Disable ASSIST Debug module clock
bool disable_crypto_periph_clk; ///< Disable crypto peripherals clock
bool disable_usb_serial_jtag; ///< Disable USB-Serial-JTAG clock
bool disable_pvt_clk; ///< Disable PVT clock
} periph_ll_clk_gate_config_t;
/**
@@ -302,8 +303,10 @@ static inline void periph_ll_clk_gate_set_default(soc_reset_reason_t rst_reason,
PCR.ctrl_tick_conf.tick_enable = 0;
PCR.trace_conf.trace_clk_en = 0;
PCR.mem_monitor_conf.mem_monitor_clk_en = 0;
PCR.pvt_monitor_conf.pvt_monitor_clk_en = 0;
PCR.pvt_monitor_func_clk_conf.pvt_monitor_func_clk_en = 0;
if (config->disable_pvt_clk) {
PCR.pvt_monitor_conf.pvt_monitor_clk_en = 0;
PCR.pvt_monitor_func_clk_conf.pvt_monitor_func_clk_en = 0;
}
PCR.ctrl_clk_out_en.val = 0;
if (config->disable_usb_serial_jtag) {