From 015fc10486cb3ae87f256d0051714af9f064fb77 Mon Sep 17 00:00:00 2001 From: kxt116 Date: Thu, 24 Sep 2026 20:49:49 +0800 Subject: [PATCH] fix(esp_system): update stale SRAM_MAIN_END in esp32p4 ld.hp_mem_defs SRAM_MAIN_END is documented as the 2nd stage bootloader iram_loader_seg start address, but it still holds the value from before 6b417e9d47, which raised bootloader_iram_loader_seg_len from 0x7000 to 0x8000 and moved that address down by 4 KB. That commit updated BOOTLOADER_IRAM_LOADER_SEG_START_EXPECTED in bootloader.memory.ld.in and SRAM_END / SRAM_LOW_END in memory.ld.in, but ld.hp_mem_defs, added two months earlier by 261bd160aa, was missed: rev < 3 : asserted 0x4FF2BBD0, SRAM_MAIN_END 0x4FF2CBD0 rev >= 3: asserted 0x4FFADFC0, SRAM_MAIN_END 0x4FFAEFC0 0x4FFADFC0 is derived at link time from bootloader_usable_dram_end minus the stack overhead, dram_seg and iram_loader segments, so it is not an extra reservation - the two constants are meant to be equal, as the comment above the ASSERT states. With CONFIG_ULP_COPROC_RUN_FROM_HP_MEM the ULP HP reservation therefore ends 4 KB inside the bootloader's iram_loader_seg (0x4FFADFC0..0x4FFAEFC0), which that same script declares off limits for the application, and SRAM_END / SRAM_LOW_END, derived from ULP_HP_MEM_START, end 4 KB higher than intended. The default build does not reference SRAM_MAIN_END at all. Also extend the sync comment in bootloader.memory.ld.in to list ld.hp_mem_defs, so the next change to the segment lengths updates every consumer. Verified for L2 128 KB and CONFIG_ULP_COPROC_RESERVE_HP_MEM_BYTES=0x10000: before: ULP block [0x4FF9EFC0, 0x4FFAEFC0) -- overlaps iram_loader_seg by 0x1000 after: ULP block [0x4FF9DFC0, 0x4FFADFC0) -- abuts iram_loader_seg exactly Closes https://github.com/espressif/esp-idf/issues/19133 Merges https://github.com/espressif/esp-idf/pull/19135 --- .../subproject/main/ld/esp32p4/bootloader.memory.ld.in | 1 + components/esp_system/ld/esp32p4/ld.hp_mem_defs | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/components/bootloader/subproject/main/ld/esp32p4/bootloader.memory.ld.in b/components/bootloader/subproject/main/ld/esp32p4/bootloader.memory.ld.in index e7870d8dcb1..4fdc2125797 100644 --- a/components/bootloader/subproject/main/ld/esp32p4/bootloader.memory.ld.in +++ b/components/bootloader/subproject/main/ld/esp32p4/bootloader.memory.ld.in @@ -52,6 +52,7 @@ MEMORY * 1. Check what the new value of bootloader_iram_loader_seg start is. * 2. Update the value in this assert. * 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32p4/memory.ld.in to the same value. + * 4. Update SRAM_MAIN_END in components/esp_system/ld/esp32p4/ld.hp_mem_defs to the same value. */ #if !CONFIG_ESP32P4_SELECTS_REV_LESS_V3 #define BOOTLOADER_IRAM_LOADER_SEG_START_EXPECTED 0x4FFADFC0 diff --git a/components/esp_system/ld/esp32p4/ld.hp_mem_defs b/components/esp_system/ld/esp32p4/ld.hp_mem_defs index 18ac6b5979f..6351c6bd335 100644 --- a/components/esp_system/ld/esp32p4/ld.hp_mem_defs +++ b/components/esp_system/ld/esp32p4/ld.hp_mem_defs @@ -7,9 +7,9 @@ /* ESP32-P4 target-specific HP memory definitions shared between HP app and LP Core linker scripts */ #if CONFIG_ESP32P4_SELECTS_REV_LESS_V3 -#define SRAM_MAIN_END 0x4FF2CBD0 /* 2nd stage bootloader iram_loader_seg start address (rev < 3) */ +#define SRAM_MAIN_END 0x4FF2BBD0 /* 2nd stage bootloader iram_loader_seg start address (rev < 3) */ #else -#define SRAM_MAIN_END 0x4FFAEFC0 /* 2nd stage bootloader iram_loader_seg start address (rev3+) */ +#define SRAM_MAIN_END 0x4FFADFC0 /* 2nd stage bootloader iram_loader_seg start address (rev3+) */ #endif #if CONFIG_ULP_COPROC_RUN_FROM_HP_MEM