From 230b7b5892181cb46ba08322752a4489ddbc2f63 Mon Sep 17 00:00:00 2001 From: Chen Chen Date: Fri, 10 Apr 2026 11:21:14 +0800 Subject: [PATCH] fix(i2c): reset master before bus clear on chips without HW FSM reset Reorder s_i2c_hw_fsm_reset() so i2c_ll_reset_register and interrupt masking run before s_i2c_master_clear_bus(). Avoids ISR firing when i2c_common_set_pins reconnects GPIOs to a stuck FSM (IDFGH-17497). Closes https://github.com/espressif/esp-idf/issues/18438 Made-with: Cursor --- components/esp_driver_i2c/i2c_master.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/components/esp_driver_i2c/i2c_master.c b/components/esp_driver_i2c/i2c_master.c index ba75cefa61f..82dd74b1ad7 100644 --- a/components/esp_driver_i2c/i2c_master.c +++ b/components/esp_driver_i2c/i2c_master.c @@ -125,11 +125,8 @@ static esp_err_t s_i2c_hw_fsm_reset(i2c_master_bus_handle_t i2c_master, bool cle i2c_hal_get_timing_config(hal, &timing_config); i2c_ll_master_get_filter(hal->dev, &filter_cfg); - //to reset the I2C hw module, we need re-enable the hw - if (clear_bus) { - ret = s_i2c_master_clear_bus(i2c_master->base); - } - I2C_RCC_ATOMIC() { + // Run bus clear after reset and interrupt masking; reconnecting pins must not wake a stuck FSM. + PERIPH_RCC_ATOMIC() { i2c_ll_reset_register(i2c_master->base->port_num); } @@ -143,6 +140,10 @@ static esp_err_t s_i2c_hw_fsm_reset(i2c_master_bus_handle_t i2c_master, bool cle i2c_ll_clear_intr_mask(hal->dev, I2C_LL_INTR_MASK); i2c_hal_set_timing_config(hal, &timing_config); i2c_ll_master_set_filter(hal->dev, filter_cfg); + + if (clear_bus) { + ret = s_i2c_master_clear_bus(i2c_master->base); + } #else i2c_ll_master_fsm_rst(hal->dev); if (clear_bus) {