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feat(uart): support HP/LP uart on ESP32S31

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gaoxu
2026-04-15 10:57:26 +08:00
parent 668dfb7e33
commit 0068fb1507
24 changed files with 1374 additions and 125 deletions
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components/esp_hal_uart/esp32c5/include/hal/uart_ll.h
+109 -1
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -92,6 +92,10 @@ typedef enum {
UART_INTR_WAKEUP = (0x1 << 19),
} uart_intr_t;
typedef enum {
UART_LL_MEM_LP_MODE_SHUT_DOWN, // force memory low power
} uart_ll_mem_lp_mode_t;
/**
* @brief Sync the update to UART core clock domain
*
@@ -242,6 +246,42 @@ static inline void lp_uart_ll_reset_register(int hw_id)
lp_uart_ll_reset_register(__VA_ARGS__); \
} while(0)
/**
* @brief Force LP UART memory block powered on by software.
*/
FORCE_INLINE_ATTR void lp_uart_ll_mem_force_power_on(void)
{
LP_UART.mem_conf.mem_force_pd = 0;
LP_UART.mem_conf.mem_force_pu = 1;
}
/**
* @brief Force LP UART memory block in low power by software.
*/
FORCE_INLINE_ATTR void lp_uart_ll_mem_force_low_power(void)
{
LP_UART.mem_conf.mem_force_pu = 0;
LP_UART.mem_conf.mem_force_pd = 1;
}
/**
* @brief Control LP UART memory block by PMU logic.
*/
FORCE_INLINE_ATTR void lp_uart_ll_mem_power_by_pmu(void)
{
LP_UART.mem_conf.mem_force_pd = 0;
LP_UART.mem_conf.mem_force_pu = 0;
}
/**
* @brief Set LP UART memory low power mode in low power stage (no mem_lp_mode field; assert shut-down mode only).
*/
FORCE_INLINE_ATTR void lp_uart_ll_mem_set_low_power_mode(uart_ll_mem_lp_mode_t mode)
{
HAL_ASSERT(mode == UART_LL_MEM_LP_MODE_SHUT_DOWN);
(void)mode;
}
/*************************************** General LL functions ******************************************/
/**
@@ -428,6 +468,74 @@ FORCE_INLINE_ATTR void uart_ll_get_sclk(uart_dev_t *hw, soc_module_clk_t *source
}
}
/**
* @brief Force UART memory block powered on by software.
*
* @param hw Beginning address of the peripheral registers.
*
* @return None.
*/
FORCE_INLINE_ATTR void uart_ll_mem_force_power_on(uart_port_t uart_num)
{
uart_dev_t *hw = UART_LL_GET_HW(uart_num);
if (uart_num != LP_UART_NUM_0) {
hw->mem_conf.mem_force_pd = 0;
hw->mem_conf.mem_force_pu = 1;
} else {
lp_uart_ll_mem_force_power_on();
}
}
/**
* @brief Force UART memory block in low power by software.
*
* @param hw Beginning address of the peripheral registers.
*
* @return None.
*/
FORCE_INLINE_ATTR void uart_ll_mem_force_low_power(uart_port_t uart_num)
{
uart_dev_t *hw = UART_LL_GET_HW(uart_num);
if (uart_num != LP_UART_NUM_0) {
hw->mem_conf.mem_force_pu = 0;
hw->mem_conf.mem_force_pd = 1;
} else {
lp_uart_ll_mem_force_low_power();
}
}
/**
* @brief Control UART memory block by PMU logic.
*
* @param hw Beginning address of the peripheral registers.
*
* @return None.
*/
FORCE_INLINE_ATTR void uart_ll_mem_power_by_pmu(uart_port_t uart_num)
{
uart_dev_t *hw = UART_LL_GET_HW(uart_num);
if (uart_num != LP_UART_NUM_0) {
hw->mem_conf.mem_force_pd = 0;
hw->mem_conf.mem_force_pu = 0;
} else {
lp_uart_ll_mem_power_by_pmu();
}
}
/**
* @brief Set UART memory low power mode in low power stage.
*
* @param hw Beginning address of the peripheral registers.
* @param mode UART memory low power mode.
*
* @return None.
*/
FORCE_INLINE_ATTR void uart_ll_mem_set_low_power_mode(uart_port_t uart_num, uart_ll_mem_lp_mode_t mode)
{
HAL_ASSERT(mode == UART_LL_MEM_LP_MODE_SHUT_DOWN);
(void)uart_num;
}
/**
* @brief Configure the baud-rate.
*