/*
 * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
#ifndef _SOC_GPIO_SIG_MAP_H_
#define _SOC_GPIO_SIG_MAP_H_

#define SPICLK_OUT_MUX_IDX            SPICLK_OUT_IDX
#define SPIQ_IN_IDX                   0
#define SPIQ_OUT_IDX                  0
#define SPID_IN_IDX                   1
#define SPID_OUT_IDX                  1
#define SPIHD_IN_IDX                  2
#define SPIHD_OUT_IDX                 2
#define SPIWP_IN_IDX                  3
#define SPIWP_OUT_IDX                 3
#define SPICLK_OUT_IDX                4
#define SPICS0_OUT_IDX                5
#define U0RXD_IN_IDX                  6
#define U0TXD_OUT_IDX                 6
#define U0CTS_IN_IDX                  7
#define U0RTS_OUT_IDX                 7
#define U0DSR_IN_IDX                  8
#define U0DTR_OUT_IDX                 8
#define U1RXD_IN_IDX                  9
#define U1TXD_OUT_IDX                 9
#define U1CTS_IN_IDX                  10
#define U1RTS_OUT_IDX                 10
#define U1DSR_IN_IDX                  11
#define U1DTR_OUT_IDX                 11
#define SPIQ_MONITOR_IDX              15
#define SPID_MONITOR_IDX              16
#define SPIHD_MONITOR_IDX             17
#define SPIWP_MONITOR_IDX             18
#define SPICS1_OUT_IDX                19
#define CPU_TESTBUS0_IDX              20
#define CPU_TESTBUS1_IDX              21
#define CPU_TESTBUS2_IDX              22
#define CPU_TESTBUS3_IDX              23
#define CPU_TESTBUS4_IDX              24
#define CPU_TESTBUS5_IDX              25
#define CPU_TESTBUS6_IDX              26
#define CPU_TESTBUS7_IDX              27
#define CPU_GPIO_IN0_IDX              28
#define CPU_GPIO_OUT0_IDX             28
#define CPU_GPIO_IN1_IDX              29
#define CPU_GPIO_OUT1_IDX             29
#define CPU_GPIO_IN2_IDX              30
#define CPU_GPIO_OUT2_IDX             30
#define CPU_GPIO_IN3_IDX              31
#define CPU_GPIO_OUT3_IDX             31
#define CPU_GPIO_IN4_IDX              32
#define CPU_GPIO_OUT4_IDX             32
#define CPU_GPIO_IN5_IDX              33
#define CPU_GPIO_OUT5_IDX             33
#define CPU_GPIO_IN6_IDX              34
#define CPU_GPIO_OUT6_IDX             34
#define CPU_GPIO_IN7_IDX              35
#define CPU_GPIO_OUT7_IDX             35
#define EXT_ADC_START_IDX             45
#define LEDC_LS_SIG_OUT0_IDX          45
#define LEDC_LS_SIG_OUT1_IDX          46
#define LEDC_LS_SIG_OUT2_IDX          47
#define LEDC_LS_SIG_OUT3_IDX          48
#define LEDC_LS_SIG_OUT4_IDX          49
#define LEDC_LS_SIG_OUT5_IDX          50
#define RMT_SIG_IN0_IDX               51
#define RMT_SIG_OUT0_IDX              51
#define RMT_SIG_IN1_IDX               52
#define RMT_SIG_OUT1_IDX              52
#define I2CEXT0_SCL_IN_IDX            53
#define I2CEXT0_SCL_OUT_IDX           53
#define I2CEXT0_SDA_IN_IDX            54
#define I2CEXT0_SDA_OUT_IDX           54
#define FSPICLK_IN_IDX                63
#define FSPICLK_OUT_IDX               63
#define FSPIQ_IN_IDX                  64
#define FSPIQ_OUT_IDX                 64
#define FSPID_IN_IDX                  65
#define FSPID_OUT_IDX                 65
#define FSPIHD_IN_IDX                 66
#define FSPIHD_OUT_IDX                66
#define FSPIWP_IN_IDX                 67
#define FSPIWP_OUT_IDX                67
#define FSPICS0_IN_IDX                68
#define FSPICS0_OUT_IDX               68
#define FSPICS1_OUT_IDX               69
#define FSPICS2_OUT_IDX               70
#define FSPICS3_OUT_IDX               71
#define FSPICS4_OUT_IDX               72
#define FSPICS5_OUT_IDX               73
#define EXTERN_PRIORITY_I_IDX         77
#define EXTERN_PRIORITY_O_IDX         77
#define EXTERN_ACTIVE_I_IDX           78
#define EXTERN_ACTIVE_O_IDX           78
#define GPIO_EVENT_MATRIX_IN0_IDX     79
#define GPIO_TASK_MATRIX_OUT0_IDX     79
#define GPIO_EVENT_MATRIX_IN1_IDX     80
#define GPIO_TASK_MATRIX_OUT1_IDX     80
#define GPIO_EVENT_MATRIX_IN2_IDX     81
#define GPIO_TASK_MATRIX_OUT2_IDX     81
#define GPIO_EVENT_MATRIX_IN3_IDX     82
#define GPIO_TASK_MATRIX_OUT3_IDX     82
#define BB_DIAG8_OUT_IDX              83
#define BB_DIAG9_OUT_IDX              84
#define BB_DIAG10_OUT_IDX             85
#define BB_DIAG11_OUT_IDX             86
#define BB_DIAG12_OUT_IDX             87
#define BB_DIAG13_OUT_IDX             88
#define ANT_SEL0_IDX                  89
#define ANT_SEL1_IDX                  90
#define ANT_SEL2_IDX                  91
#define ANT_SEL3_IDX                  92
#define ANT_SEL4_IDX                  93
#define ANT_SEL5_IDX                  94
#define ANT_SEL6_IDX                  95
#define ANT_SEL7_IDX                  96
#define SIG_IN_FUNC_97_IDX            97
#define SIG_IN_FUNC97_IDX             97
#define SIG_IN_FUNC_98_IDX            98
#define SIG_IN_FUNC98_IDX             98
#define SIG_IN_FUNC_99_IDX            99
#define SIG_IN_FUNC99_IDX             99
#define SIG_IN_FUNC_100_IDX           100
#define SIG_IN_FUNC100_IDX            100
#define BLE_DBG_SYNCERR_IDX           101
#define BLE_DBG_SYNC_FOUND_IDX        102
#define BLE_DBG_CH_IDX_IDX            103
#define BLE_DBG_SYNC_WINDOW_IDX       104
#define BLE_DBG_DATA_EN_IDX           105
#define BLE_DBG_DATA_IDX              106
#define BLE_DBG_PKT_TX_ON_IDX         107
#define BLE_DBG_PKT_RX_ON_IDX         108
#define BLE_DBG_TXRU_ON_IDX           109
#define BLE_DBG_RXRU_ON_IDX           110
#define BLE_DBG_LELC_ST0_IDX          111
#define BLE_DBG_LELC_ST1_IDX          112
#define BLE_DBG_LELC_ST2_IDX          113
#define BLE_DBG_LELC_ST3_IDX          114
#define BLE_DBG_CRCOK_IDX             115
#define BLE_DBG_CLK_GPIO_IDX          116
#define BLE_DBG_RADIO_START_IDX       117
#define BLE_DBG_SEQUENCE_ON_IDX       118
#define BLE_DBG_COEX_BT_ON_IDX        119
#define BLE_DBG_COEX_WIFI_ON_IDX      120
#define CLK_OUT_OUT1_IDX              123
#define CLK_OUT_OUT2_IDX              124
#define CLK_OUT_OUT3_IDX              125
#define SIG_GPIO_OUT_IDX              128
#define GPIO_MAP_DATE_IDX             0x2106190
#endif  /* _SOC_GPIO_SIG_MAP_H_ */
